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2015-09-09braswell: acpi: Allow DPTF thresholds to be defined at board-levelShawn Nematbakhsh
Similar to Skylake, allow braswell mainboards to override the default DPTF thresholds. BUG=chrome-os-partner:43884 TEST=Build for Strago BRANCH=Strago Change-Id: Id2574e98c444b8bf4da8ca36f3eeeb06568e78e0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 799a7006e8fcacfea8e8e0de5c99c3ce3c4ac34f Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Original-Change-Id: If69627163237674a28fb8a26b4ce1886e5dbfc17 Original-Reviewed-on: https://chromium-review.googlesource.com/296033 Original-Commit-Ready: Shawn N <shawnn@chromium.org> Original-Tested-by: Shawn N <shawnn@chromium.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/11546 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-21braswell: clean up \_PR entriesJagadish Krishnamoorthy
All \_PR entries needs to be changed from CPU# to CP## so that it can support more cores. BRANCH=none BUG=chrome-os-partner:38734 TEST=build and boot cyan/strago boards. Change-Id: I80a79ec8edbce46826140470645b7532ae361f91 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ca269a7ffcd2ef16fcef93851e68c2d91104e3e1 Original-Change-Id: I48e73742dc3b11ee6e96f70bcd2d10d01609ad7c Original-Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/285700 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10991 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-25Braswell: Add Braswell SOC supportLee Leahy
Add the files to support the Braswell SOC. BRANCH=none BUG=None TEST=Build for a Braswell platform Change-Id: I968da68733e57647d0a08e4040ff0378b4d59004 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10051 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-05-28Remove address from GPLv2 headersPatrick Georgi
Follow up for commit b890a12, some contributions brought back a number of FSF addresses, so get rid of them again. Change-Id: I0ac0c957738ce512deb0ed82b2219ef90d96d46b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10322 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-05-23Braswell: Use Baytrail as Comparison BaseLee Leahy
Add baytrail source for comparison with Braswell. BRANCH=none BUG=None TEST=None Change-Id: I5170addf41676d95a3daf070a32bcee085f8156d Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10117 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>