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path: root/src/soc/intel/baytrail
AgeCommit message (Expand)Author
2017-06-02soc/baytrail: add missing USB port defsMatt DeVillier
2017-05-24soc/intel: Move spi driver to use spi_bus_mapFurquan Shaikh
2017-05-05drivers/spi: Re-factor spi_crop_chunkFurquan Shaikh
2017-04-25soc/intel: Unify `timestamp.inc`Paul Menzel
2017-03-28vboot: Select SoC-specific configuration for all Chrome OS boardsJulius Werner
2017-02-14google/rambi: add explicit pull-down for ram-idMatt DeVillier
2016-12-23spi: Get rid of SPI_ATOMIC_SEQUENCINGFurquan Shaikh
2016-12-15soc/intel/common: remove mrc cache assumptionsAaron Durbin
2016-12-07MMCONF_SUPPORT: Flip default to enabledKyösti Mälkki
2016-12-05spi: Define and use spi_ctrlr structureFurquan Shaikh
2016-12-05spi: Pass pointer to spi_slave structure in spi_setup_slaveFurquan Shaikh
2016-12-05spi: Fix parameter types for spi functionsFurquan Shaikh
2016-12-04spi_flash: Move spi flash opcodes to spi_flash.hFurquan Shaikh
2016-12-01lib: put romstage_handoff implementation in own compilation unitAaron Durbin
2016-12-01romstage_handoff: remove code duplicationAaron Durbin
2016-11-22spi: Clean up SPI flash driver interfaceFurquan Shaikh
2016-11-22Remove explicit select MMCONF_SUPPORTKyösti Mälkki
2016-11-18intel post-car: Increase stacktop alignmentKyösti Mälkki
2016-11-08intel car: Remove references to DCACHE_RAM_ROMSTACK_SIZEKyösti Mälkki
2016-10-31lib/prog_loaders: use common ramstage_cache_invalid()Aaron Durbin
2016-08-31src/soc: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-19Kconfig: introduce writable boot device notionAaron Durbin
2016-08-08chromeos chipsets: select RTC usageAaron Durbin
2016-07-31src/soc: Capitalize CPU, ACPI, RAM and ROMElyes HAOUAS
2016-07-30chromeos mainboards: remove chromeos.aslAaron Durbin
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
2016-07-15soc/intel/baytrail: use common Intel ACPI hardware definitionsAaron Durbin
2016-07-10intel post-car: Consolidate choose_top_of_stack()Kyösti Mälkki
2016-06-29intel romstage: Use run_ramstage()Kyösti Mälkki
2016-06-22Ignore RAMTOP for MTRRsKyösti Mälkki
2016-06-18intel cache_as_ram: Fix typo in commentKyösti Mälkki
2016-06-17Fix some cbmem.h includesKyösti Mälkki
2016-05-06soc/intel: indicate to build system that XIP_ROM_SIZE isn't usedAaron Durbin
2016-05-06{cpu,soc}/intel: remove unused smm_init() functionAaron Durbin
2016-05-04soc/intel/baytrail: convert to using common MP and SMM initAaron Durbin
2016-05-04cpu/x86: remove BACKUP_DEFAULT_SMM_REGION optionAaron Durbin
2016-05-03intel/baytrail: use fmap information for code cachingPatrick Georgi
2016-05-02cpu/x86/mp_init: remove unused callback argumentsAaron Durbin
2016-04-14soc/intel: Update license headersMartin Roth
2016-03-08x86 chipsets: utilize x86_setup_mtrrs_with_detect()Aaron Durbin
2016-02-26tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"Denis 'GNUtoo' Carikli
2015-12-10ACPI: Fix IASL Warning about unused method for GBUF checkMartin Roth
2015-12-10lib: remove assets infrastructureAaron Durbin
2015-11-28baytrail: fix missing brackets around ir_base to fix IRQ routingAlexander Couzens
2015-11-24intel/soc/baytrail: Move MCRS ResourceTemplate out of _CRS methodMartin Roth
2015-11-21baytrail: add C0 and D0 stepping decodeBen Gardner
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-05Add EM100 'hyper term' spi console support in ramstage & smmMartin Roth
2015-09-30cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc
2015-09-29intel: auto include intel/common/firmwareAaron Durbin
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-09-23chromeos: vboot and chromeos dependency removal for sw write protect statePaul Kocialkowski
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-09-07Drop "See file CREDITS..." commentStefan Reinauer
2015-09-04bootstate: remove need for #ifdef ENV_RAMSTAGEAaron Durbin
2015-09-04x86: remove cpu_incs as romstage Make variableAaron Durbin
2015-07-07x86: Drop -Wa,--divideStefan Reinauer
2015-07-02Move baytrail & fsp_baytrail to the common IFD interface.Martin Roth
2015-06-24Kconfig: Get rid of obsolete symbolsMartin Roth
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
2015-06-09stage_cache: use cbmem init hooksAaron Durbin
2015-06-09cbmem: add indicator to hooks if cbmem is being recoveredAaron Durbin
2015-06-09cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() APIKyösti Mälkki
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-06-05device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens
2015-06-05device_ops: add device_t argument to acpi_inject_dsdt_generatorAlexander Couzens
2015-06-04devicetree: Change scan_bus() prototype in device opsKyösti Mälkki
2015-06-04devicetree: Discriminate device ops scan_bus()Kyösti Mälkki
2015-06-02assets: abstract away the firmware assets used for bootingAaron Durbin
2015-06-02cbfs: new API and better program loadingAaron Durbin
2015-05-29chromeos: always enable timestampsStefan Reinauer
2015-05-28smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko
2015-05-27Move TPM code out of chromeosVladimir Serbinenko
2015-05-26acpi: Remove monolithic ACPIVladimir Serbinenko
2015-05-23baytrail: Switch to per-device ACPIVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-13baytrail: broadwell: correct refcode loadingAaron Durbin
2015-05-053rdparty: move to 3rdparty/blobsPatrick Georgi
2015-05-053rdparty: Move to blobsPatrick Georgi
2015-05-01intel: Correct MMIO related ACPI table settingsDave Frodin
2015-04-30kbuild: Don't require intel/common changes for every socStefan Reinauer
2015-04-29kbuild: automatically include SOCsStefan Reinauer
2015-04-22coreboot: common stage cacheAaron Durbin
2015-04-15soc/baytrail: Use microcode from the blobs repositoryMarc Jones
2015-04-10baytrail: correct NC pin to GPO pin according to BYT platform design guideKane Chen
2015-04-10baytrail: add code for supporting 2x ddr refresh rateKane Chen
2015-04-10baytrail: fix the coding error on PCIe L1 exit latencyKevin L Lee
2015-04-10Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 msKevin Hsieh
2015-04-10baytrail: Switch from ACPI mode to PCI mode for legacy supportMarc Jones
2015-04-07baytrail: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-04-06baytrail: Fix hdmi audio choppy issueKein Yuan
2015-04-06baytrail: reinitialize spi controller in SMM finalizationAaron Durbin
2015-04-04Baytrail: Fix no_dev_behind_port not executed for RP1/2/3.Kenji Chen
2015-04-03rmodule: use struct prog while loading rmodulesAaron Durbin
2015-04-02baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPUKein Yuan
2015-04-02Baytrail: Change PCIe root disable algorithmKenji Chen
2015-04-02Baytrail: add _PRT to each PCIe root port deviceTed Kuo
2015-04-01cbfs: correct types used for accessing filesAaron Durbin
2015-03-30baytrail: fix HAVE_REFCODE_BLOB build errorsAaron Durbin
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