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path: root/src/soc/intel/baytrail/romstage/cache_as_ram.inc
AgeCommit message (Expand)Author
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-07-07x86: Drop -Wa,--divideStefan Reinauer
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-02-11baytrail: adjust cache policy during romstageAaron Durbin
2014-02-05baytrail: start collecting timestampsAaron Durbin
2014-01-31baytrail: add initial supportAaron Durbin