coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-01-08	cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCK	Kyösti Mälkki
2018-12-28	soc/intel: Drop romstage_after_car()	Kyösti Mälkki
2018-10-30	src: Add missing include <stdint.h>	Elyes HAOUAS
2018-10-22	intel: Use CF9 reset (part 1)	Patrick Rudolph
2018-10-11	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-10-05	src: Fix MSR_PKG_CST_CONFIG_CONTROL register name	Elyes HAOUAS
2018-08-22	cbtable: remove chromeos_acpi from cbtable	Joel Kitching
2018-07-09	src/soc: Use "foo bar" instead of "foo bar"	Elyes HAOUAS
2018-06-04	src/soc: Get rid of whitespace before tab	Elyes HAOUAS
2018-06-04	src: Use "foo bar" instead of "foo bar"	Elyes HAOUAS
2018-05-24	soc/intel/baytrail: Get rid of device_t	Elyes HAOUAS
2018-03-14	soc/intel/baytrail: add support for Intel GMA OpRegion	Matt DeVillier
2017-11-04	sb and soc: Enforce correct offset of member "chromeos" in global_nvs_t	Jonathan Neuschäfer
2017-09-20	soc/intel/baytrail: refactor rtc failure checking	Aaron Durbin
2017-07-13	soc/intel: add IS_ENABLED() around Kconfig symbol references	Martin Roth
2017-07-13	Rename __attribute__((packed)) --> __packed	Stefan Reinauer
2017-02-14	google/rambi: add explicit pull-down for ram-id	Matt DeVillier
2016-07-31	src/soc: Capitalize CPU, ACPI, RAM and ROM	Elyes HAOUAS
2016-07-30	chromeos mainboards: remove chromeos.asl	Aaron Durbin
2016-07-15	soc/intel/baytrail: use common Intel ACPI hardware definitions	Aaron Durbin
2015-11-21	baytrail: add C0 and D0 stepping decode	Ben Gardner
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-23	baytrail: Switch to per-device ACPI	Vladimir Serbinenko
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-04-10	baytrail: correct NC pin to GPO pin according to BYT platform design guide	Kane Chen
2015-04-07	baytrail: Change all SoC headers to <soc/headername.h> system	Julius Werner