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path: root/src/soc/intel/baytrail/include
AgeCommit message (Expand)Author
2019-08-28google/rambi,intel/baytrail: Simplified romstage flowKyösti Mälkki
2019-08-27intel/baytrail: Use smm_subregion()Kyösti Mälkki
2019-08-21arch/x86: Rename some mainboard_romstage_entry()Kyösti Mälkki
2019-08-21intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessorKyösti Mälkki
2019-08-18cpu/intel: Enter romstage without BISTKyösti Mälkki
2019-08-15soc/intel: Rename some SMM support functionsKyösti Mälkki
2019-05-29sb/intel/*: Delete early_spiPatrick Rudolph
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
2019-01-08cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCKKyösti Mälkki
2018-12-28soc/intel: Drop romstage_after_car()Kyösti Mälkki
2018-10-30src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-22intel: Use CF9 reset (part 1)Patrick Rudolph
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-08Move compiler.h to commonlibNico Huber
2018-10-05src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS
2018-08-22cbtable: remove chromeos_acpi from cbtableJoel Kitching
2018-07-09src/soc: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-04src/soc: Get rid of whitespace before tabElyes HAOUAS
2018-06-04src: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-05-24soc/intel/baytrail: Get rid of device_tElyes HAOUAS
2018-03-14soc/intel/baytrail: add support for Intel GMA OpRegionMatt DeVillier
2017-11-04sb and soc: Enforce correct offset of member "chromeos" in global_nvs_tJonathan Neuschäfer
2017-09-20soc/intel/baytrail: refactor rtc failure checkingAaron Durbin
2017-07-13soc/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
2017-02-14google/rambi: add explicit pull-down for ram-idMatt DeVillier
2016-07-31src/soc: Capitalize CPU, ACPI, RAM and ROMElyes HAOUAS
2016-07-30chromeos mainboards: remove chromeos.aslAaron Durbin
2016-07-15soc/intel/baytrail: use common Intel ACPI hardware definitionsAaron Durbin
2015-11-21baytrail: add C0 and D0 stepping decodeBen Gardner
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-23baytrail: Switch to per-device ACPIVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-10baytrail: correct NC pin to GPO pin according to BYT platform design guideKane Chen
2015-04-07baytrail: Change all SoC headers to <soc/headername.h> systemJulius Werner