summaryrefslogtreecommitdiff
path: root/src/soc/intel/baytrail/Kconfig
AgeCommit message (Expand)Author
2020-10-02drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen
2020-09-26arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`Angel Pons
2020-08-02soc/intel/baytrail: Add native refcode replacementMate Kukri
2020-07-26cpu,soc/intel: Drop select SMPKyösti Mälkki
2020-06-15arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki
2020-06-10ACPI: Remove Kconfig COMMON_FADTKyösti Mälkki
2020-06-07soc/intel/baytrail,braswell,broadwell,quark: Select COMMON_FADTKyösti Mälkki
2020-01-14soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUSKyösti Mälkki
2019-12-19arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHEKyösti Mälkki
2019-11-29soc/intel/baytrail: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-27soc/intel/baytrail: Use sb/intel/common/spi.cArthur Heymans
2019-11-25Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans
2019-11-03cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki
2019-08-11arch/x86: Flip option NO_CAR_GLOBAL_MIGRATIONKyösti Mälkki
2019-08-11arch/x86: Enable POSTCAR_CONSOLE by defaultKyösti Mälkki
2019-07-09cpu/x86: Flip SMM_TSEG defaultKyösti Mälkki
2019-06-02soc/intel/baytrail: set default VBIOS filename and PCI IDMatt DeVillier
2019-04-30vboot: refactor OPROM codeJoel Kitching
2019-04-01vboot: Select CONFIG_VBOOT_OPROM_MATTERS in more casesJulius Werner
2019-02-11soc/intel/baytrail: Use non-evict CAR setupArthur Heymans
2018-12-30arch/x86: Use a common timestamp.inc with romcc bootblocksKyösti Mälkki
2018-12-24soc/intel/*: Select SUPPORT_CPU_UCODE_IN_CBFS only onceArthur Heymans
2018-12-18soc/baytrail: add vmx support via CPU_INTEL_COMMONMatt DeVillier
2018-12-05soc/intel/baytrail: Implement POSTCAR stageArthur Heymans
2018-10-22intel: Use CF9 reset (part 1)Patrick Rudolph
2018-09-13src/*/intel/: clarify Kconfig options regarding IFDStefan Tauner
2018-06-29soc/intel/baytrail: Fix Kconfig for mrc.bin inclusionArthur Heymans
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-03-14soc/intel/baytrail: add support for Intel GMA OpRegionMatt DeVillier
2017-03-28vboot: Select SoC-specific configuration for all Chrome OS boardsJulius Werner
2016-12-07MMCONF_SUPPORT: Flip default to enabledKyösti Mälkki
2016-11-22Remove explicit select MMCONF_SUPPORTKyösti Mälkki
2016-11-08intel car: Remove references to DCACHE_RAM_ROMSTACK_SIZEKyösti Mälkki
2016-08-19Kconfig: introduce writable boot device notionAaron Durbin
2016-08-08chromeos chipsets: select RTC usageAaron Durbin
2016-07-15soc/intel/baytrail: use common Intel ACPI hardware definitionsAaron Durbin
2016-05-06soc/intel: indicate to build system that XIP_ROM_SIZE isn't usedAaron Durbin
2016-05-04cpu/x86: remove BACKUP_DEFAULT_SMM_REGION optionAaron Durbin
2015-10-05Add EM100 'hyper term' spi console support in ramstage & smmMartin Roth
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-07-02Move baytrail & fsp_baytrail to the common IFD interface.Martin Roth
2015-06-24Kconfig: Get rid of obsolete symbolsMartin Roth
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
2015-05-29chromeos: always enable timestampsStefan Reinauer
2015-05-28smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko
2015-05-26acpi: Remove monolithic ACPIVladimir Serbinenko
2015-05-23baytrail: Switch to per-device ACPIVladimir Serbinenko
2015-05-053rdparty: move to 3rdparty/blobsPatrick Georgi
2015-05-053rdparty: Move to blobsPatrick Georgi
2015-04-30kbuild: Don't require intel/common changes for every socStefan Reinauer
2015-02-25soc/intel/baytrail/Kconfig: Remove explicit `HAVE_MONOTONIC_TIMER`Paul Menzel
2015-01-27CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki
2015-01-27vboot2: add verstageStefan Reinauer
2014-12-28intel baytrail broadwell: Include microcode updatesKyösti Mälkki
2014-10-28baytrail: move cache-as-ram base address to 0xfe000000Aaron Durbin
2014-10-22reg_script: default to n for ARCH_X86Isaac Christensen
2014-10-22baytrail: Move MRC cache code to a common directoryDuncan Laurie
2014-10-22baytrail/rambi: S3 support and other updatesKein Yuan
2014-10-19haswell baytrail: Enable RELOCATABLE_RAMSTAGEKyösti Mälkki
2014-08-28soc/intel/baytrail/Kconfig: Remove empty line at top filePaul Menzel
2014-08-15Move baytrail-specific config to baytrail.Vladimir Serbinenko
2014-07-23src/.../Kconfig: various small fixes to textsDaniele Forsi
2014-05-15baytrail: Enable PCIe common clock and ASPMDuncan Laurie
2014-05-15baytrail: use CPU_INTEL_TURBO_NOT_PACKAGE_SCOPEDAaron Durbin
2014-05-07baytrail: romstage: Add config option to enable RMTShawn Nematbakhsh
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
2014-02-25Remove CACHE_ROM.Vladimir Serbinenko
2014-02-17baytrail: enable monotonic timerAaron Durbin
2014-02-16baytrail: bring up APsAaron Durbin
2014-02-11baytrail: add reset supportAaron Durbin
2014-02-11baytrail: adjust cache policy during romstageAaron Durbin
2014-02-05baytrail: Rearrange config options alphanumericallyVadim Bendebury
2014-02-05baytrail: start collecting timestampsAaron Durbin
2014-01-31baytrail: add initial supportAaron Durbin
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 23:48:29 +0000