coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-05-06	soc/intel/apollolake: Correct PCI write size in romstage	Furquan Shaikh
2016-05-04	soc/apollolake: Set BootMode based on previous sleep state	Ravi Sarawadi
2016-05-04	soc/apollolake/romstage: Do not cast const to non-const pointers	Alexandru Gagniuc
2016-04-28	soc/intel/apollolake: Enable RAM cache for cbmem region in ramstage	Andrey Petrov
2016-04-14	soc/intel: Update license headers	Martin Roth
2016-04-13	soc/intel/apollolake: logically group PMC BAR programming	Aaron Durbin
2016-04-11	soc/intel/apollolake: Enabling using of MRC data when available	Andrey Petrov
2016-03-23	soc/intel/apollolake: utilize postcar phase/stage	Aaron Durbin
2016-03-11	soc/intel/apollolake: Avoid hardcoding CAR region size for FSPM	Andrey Petrov
2016-03-09	drivers/intel/fsp2_0: remove struct resource usage	Aaron Durbin
2016-03-09	soc/intel/apollolake: correct comment to reference top of CAR	Aaron Durbin
2016-03-08	soc/intel/apollolake: Add romstage that calls FSP2.0 driver	Andrey Petrov