index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
gitea
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
apollolake
/
chip.c
Age
Commit message (
Expand
)
Author
2016-06-24
soc/intel/apollolake: Implement global reset handling
Andrey Petrov
2016-06-21
intel/apollolake: Disable setting of EISS bit in FSP
Furquan Shaikh
2016-06-21
intel/apollolake: Enable SPI properly in bootblock and ramstage
Furquan Shaikh
2016-06-09
soc/intel/apollolake: Add EMMC DLL API
Zhao, Lijian
2016-06-08
soc/apollolake: Add SOC specific c-state table
Hannah Williams
2016-06-04
soc/apollolake: Put CSE to low power state
Hannah Williams
2016-05-26
soc/apollolake: Use simpler macros for the northbridge PCI device
Alexandru Gagniuc
2016-05-26
soc/apollolake: Add ish_enable in soc_intel_apollolake_config
Hannah Williams
2016-05-18
soc/intel/apollolake: Take advantage of common opregion code
Andrey Petrov
2016-04-28
soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds
Lance Zhao
2016-04-15
intel/apollolake: Fix logic error
Patrick Georgi
2016-04-14
soc/intel: Update license headers
Martin Roth
2016-04-13
soc/intel/apollolake: Update platform-specific FSP headers
Andrey Petrov
2016-03-10
soc/intel/apollolake: Add chip initialization
Andrey Petrov
[prev]