coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-11-21	fsp2_0: implement stage cache for silicon init	Brandon Breitenstein
2016-11-02	soc/intel/apollolake: Skip FSP initiated core/MP init	Venkateswarlu Vinjamuri
2016-10-25	Revert "soc/apollolake: Add soc core init"	Aaron Durbin
2016-10-16	soc/apollolake: Add soc core init	Ravi Sarawadi
2016-10-16	soc/intel/apollolake: Set PL1 limits for RAPL MSR registers	Sumeet Pawnikar
2016-09-19	soc/intel/apollolake: Configure ACPI name for PCIe	Vaibhav Shankar
2016-09-14	soc/intel/apollolake: Update PL1 value in RAPL MMIO register	Sumeet Pawnikar
2016-09-07	soc/apollolake: Enable/disable Audio clk and power gate in devicetree.cb	Venkateswarlu Vinjamuri
2016-09-02	drivers/intel/fsp2_0: Make FSP Headers Consumable out of Box	Brandon Breitenstein
2016-08-11	soc/apollolake: enable access to RTC NVRAM	Ravi Sarawadi
2016-08-03	drivers/intel/fsp2_0: Handle FspNotify calls	Lee Leahy
2016-08-03	drivers/intel/fsp2_0: FSP driver handles all FSP errors	Lee Leahy
2016-07-29	soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resume	Abhay Kumar
2016-07-27	soc/intel/apollolake: Disable monitor mwait	Bora Guvendik
2016-07-22	soc/intel/apollolake: die() when FSP silicon init fails	Aaron Durbin
2016-07-19	drivers/intel/fsp2_0: Split reset handling logic	Andrey Petrov
2016-07-19	drivers/intel/fsp2_0: load and relocate FSPS in cbmem	Aaron Durbin
2016-07-15	soc/intel/apollolake: Consolidate ISH enabling	Andrey Petrov
2016-07-15	soc/intel/apollolake: Properly disable PCIe root ports	Kane Chen
2016-07-13	soc/intel/apollolake: work around FSP for gpio interrupt polarity	Aaron Durbin
2016-07-02	soc/apollolake: Allow enable/disable of LPSS S0ix from devicetree	Saurabh Satija
2016-07-02	soc/intel/apollolake: handle p2sb quirks	Aaron Durbin
2016-07-02	soc/intel/apollolake: Add function to translate device into ACPI name	Duncan Laurie
2016-06-29	soc/intel/apollolake: Change PCI macros to match Skylake	Andrey Petrov
2016-06-29	soc/intel/apollolake: Update Upd header files for FSP Label 143_10	Brandon Breitenstein
2016-06-27	soc/intel/apollolake: add code to disable unused device	Jagadish Krishnamoorthy
2016-06-24	soc/intel/apollolake: Add handling of global reset in FspNotify stage	Andrey Petrov
2016-06-24	soc/intel/apollolake: Implement global reset handling	Andrey Petrov
2016-06-21	intel/apollolake: Disable setting of EISS bit in FSP	Furquan Shaikh
2016-06-21	intel/apollolake: Enable SPI properly in bootblock and ramstage	Furquan Shaikh
2016-06-09	soc/intel/apollolake: Add EMMC DLL API	Zhao, Lijian
2016-06-08	soc/apollolake: Add SOC specific c-state table	Hannah Williams
2016-06-04	soc/apollolake: Put CSE to low power state	Hannah Williams
2016-05-26	soc/apollolake: Use simpler macros for the northbridge PCI device	Alexandru Gagniuc
2016-05-26	soc/apollolake: Add ish_enable in soc_intel_apollolake_config	Hannah Williams
2016-05-18	soc/intel/apollolake: Take advantage of common opregion code	Andrey Petrov
2016-04-28	soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds	Lance Zhao
2016-04-15	intel/apollolake: Fix logic error	Patrick Georgi
2016-04-14	soc/intel: Update license headers	Martin Roth
2016-04-13	soc/intel/apollolake: Update platform-specific FSP headers	Andrey Petrov
2016-03-10	soc/intel/apollolake: Add chip initialization	Andrey Petrov