coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-05-09	soc/intel/apollolake: Select no stage caching for resume	Furquan Shaikh
2016-05-09	xip: Do not pass --xip for early stages if CAR supports code execution	Furquan Shaikh
2016-05-06	soc/intel: indicate to build system that XIP_ROM_SIZE isn't used	Aaron Durbin
2016-04-29	soc/intel/apollolake: clarify Fast SPI CS2 pad configuration	Aaron Durbin
2016-04-20	mainboard/amenia: add the inital files for amenia board	Zhao, Lijian
2016-04-11	soc/intel/apollolake: Enable CACHE_MRC_SETTINGS	Hannah Williams
2016-04-11	soc/intel/apollolake: Implement SPI controller driver	Alexandru Gagniuc
2016-03-23	soc/intel/apollolake: utilize postcar phase/stage	Aaron Durbin
2016-03-11	soc/intel/apollolake: Avoid hardcoding CAR region size for FSPM	Andrey Petrov
2016-03-08	soc/intel/apollolake: Enable using FSP 2.0 driver	Andrey Petrov
2016-03-08	soc/intel/apollolake: Add romstage that calls FSP2.0 driver	Andrey Petrov
2016-03-08	soc/intel/apollolake: Add support for memory-mapped boot media	Andrey Petrov
2016-02-26	soc/intel/apollolake: group serial console options into one Kconfig	Aaron Durbin
2016-02-13	soc/intel/apollolake: limit bootblock size to 32KiB	Aaron Durbin
2016-02-11	soc/apollolake: Add early serial driver for BOOTBLOCK_CONSOLE	Andrey Petrov
2016-02-11	soc/apollolake: Add initial cache-as-ram setup for bootblock	Alexandru Gagniuc
2016-01-30	soc/intel: Add skeleton infrastructure for Apollolake SOC	Alexandru Gagniuc