summaryrefslogtreecommitdiff
path: root/src/soc/intel/alderlake
AgeCommit message (Expand)Author
2021-01-25soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner
2021-01-23ACPI: Add helpers for CBMEM_ID_POWER_STATEKyösti Mälkki
2021-01-23ELOG: Add const qualifier for chipset_power_stateKyösti Mälkki
2021-01-22soc/intel/alderlake: Adding Kconfig for ADL_M PCHVarshit Pandya
2021-01-21soc/intel/alderlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGDSubrata Banik
2021-01-20soc/intel/*: drop broken LPC mmio codeMichael Niewöhner
2021-01-20ACPI GNVS: Drop most dev_count_cpu()Kyösti Mälkki
2021-01-18soc/intel/alderlake: Update PCH and CPU PCIe RP tableEric Lai
2021-01-18soc/intel/common: Move L1_substates_control to pcie_rp.hEric Lai
2021-01-12soc/intel: rename uart_max_indexMichael Niewöhner
2021-01-12soc/intel/alderlake: Add PCH ID 0x5182Subrata Banik
2021-01-11soc/intel/uart: Drop SoC callback `soc_uart_console_to_device`Furquan Shaikh
2021-01-10soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPsSubrata Banik
2021-01-10soc/intel: Rename to soc_fill_gnvs()Kyösti Mälkki
2021-01-10ACPI: Drop redundant ChromeOS setup for GNVSKyösti Mälkki
2021-01-10ACPI: Drop redundant CONSOLE_CBMEM setup in GNVSKyösti Mälkki
2021-01-08soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range()Furquan Shaikh
2021-01-06soc/intel/alderlake: Update CPU microcode patch base address/sizeSubrata Banik
2020-12-30soc/intel/common: Move gfx.asl to drivers/intel/gmaMatt DeVillier
2020-12-30soc/intel: hook up new gpio device in the soc chipsMichael Niewöhner
2020-12-29soc/intel/alderlake: Update chipset.cb for TCSS and USBEric Lai
2020-12-23soc/intel/alderlake: Enable support for extended BIOS windowSubrata Banik
2020-12-23soc/intel/alderlake: Add SPI DMI Destination IDSubrata Banik
2020-12-14soc/intel/alderlake: Drop unreferenced devicetree settingsAngel Pons
2020-12-09soc/intel/common/dmi: Move DMI defines into DMI driver headerSrinidhi N Kaushik
2020-12-04soc/intel/alderlake: Align chipset.cb with pci_devs.hEric Lai
2020-12-04src/soc/intel/alderlake: Enable the PCH HDAV Sowmya
2020-11-30soc/intel/alderlake: Add initial chipset.cbTim Wawrzynczak
2020-11-29soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh
2020-11-29soc/intel/alderlake: Add lp5_ccc_config to the board memory configurationSridhar Siricilla
2020-11-23soc/intel/alderlake: Update UART0 GPIO as per latest schematicsSubrata Banik
2020-11-23soc/intel/alderlake: Update DCACHE_BSP_STACK_SIZE and DCACHE_RAM_SIZESubrata Banik
2020-11-22soc/intel/alderlake: Fix overlapping memory address used for early GSPI2 and ...Bora Guvendik
2020-11-20soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPDMichael Niewöhner
2020-11-12soc/intel/alderlake: Add PCH ID 0x5181Subrata Banik
2020-11-07mb/intel: Enable ALC711 Audio codec over SNDW0 linkSridhar Siricilla
2020-11-03soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical orderSubrata Banik
2020-11-02soc/intel: Use of common reset code blockSubrata Banik
2020-10-29mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'Subrata Banik
2020-10-28soc/intel: deduplicate ACPI timer emulationMichael Niewöhner
2020-10-26mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner
2020-10-26soc/intel: drop unneeded ISST configuration codeMichael Niewöhner
2020-10-25soc/intel/alderlake/romstage: Skip GPIO configuration from FSPSubrata Banik
2020-10-24{cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner
2020-10-21soc/intel: convert XTAL frequency constant to KconfigMichael Niewöhner
2020-10-21soc/intel/common: add Kconfig for PM Timer emulation supportMichael Niewöhner
2020-10-19soc/intel/*: drop useless XTAL shutdown qualification codeMichael Niewöhner
2020-10-17cpu/intel,soc/intel: drop Kconfig for hyperthreadingMichael Niewöhner
2020-10-14soc/intel/alderlake: Enable TME for Alder LakeSubrata Banik
2020-10-08soc/intel: Make use of common gfx.aslSubrata Banik
2020-10-06soc/intel/alderlake/ramstage: Fix compilation issueSubrata Banik
2020-10-06soc/intel/alderlake/acpi: Add SoC ACPI directory for ADLSubrata Banik
2020-10-05soc/intel: remove duplicate weak versions of mainboard_get_dram_part_num()Nick Vaccaro
2020-10-05soc: move mainboard_get_dram_part_num prototype to memory_info.hNick Vaccaro
2020-10-05mb, soc: change mainboard_get_dram_part_num() prototypeNick Vaccaro
2020-10-03soc/intel/alderlake/ramstage: Do initial SoC commit till ramstageSubrata Banik
2020-10-02drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen
2020-09-27soc/intel/alderlake: Add GPIOs for Alder Lake SOCSubrata Banik
2020-09-24soc/intel/alderlake: Select ACPI_INTEL_HARDWARE_SLEEP_VALUESAngel Pons
2020-09-24soc/intel/alderlake/romstage: Fix compilation issueSubrata Banik
2020-09-22Revert "soc/intel: Refactor do_global_reset() function"Furquan Shaikh
2020-09-21soc/intel: Refactor do_global_reset() functionSubrata Banik
2020-09-19soc/intel/common/block/cse: Refactor cse_request_global_reset() functionSubrata Banik
2020-09-15soc/intel/alderlake/romstage: Do initial SoC commit till romstageSubrata Banik
2020-09-10soc/intel/alderlake: Rename pch_init() codeSubrata Banik
2020-09-09vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332Subrata Banik
2020-09-05soc/intel/alderlake/bootblock: Do initial SoC commit till bootblockSubrata Banik