| Age | Commit message (Expand) | Author |
|---|
| 2021-10-12 | soc/intel/*/cpu.c: Add missing space in comment | Angel Pons |
| 2021-10-11 | drivers/intel/dptf: Add support for PCH methods | Sumeet Pawnikar |
| 2021-10-06 | soc/intel/alderlake: Skip setting D0I3 bit for HECI devices | Subrata Banik |
| 2021-10-06 | soc/intel/alderlake: Perform `heci_finalize` prior to booting to OS | Subrata Banik |
| 2021-10-05 | src/soc to src/superio: Fix spelling errors | Martin Roth |
| 2021-10-04 | soc/intel/adl: Drop SGPM, RGPM and EGPM methods | Meera Ravindranath |
| 2021-10-04 | src/soc/intel/alderlake: Add PsysPmax setting | Ryan Lin |
| 2021-10-01 | soc/intel/alderlake: add power limits for Alder Lake-M 282 SKU | Sumeet Pawnikar |
| 2021-09-30 | soc/intel/alderlake: Add CPU ID 0x906a4 | Meera Ravindranath |
| 2021-09-30 | soc/intel/alderlake: Perform `soc_finalize` at entry of BS_PAYLOAD_BOOT | Subrata Banik |
| 2021-09-29 | soc/intel: Drop unnecessary `select REG_SCRIPT` | Angel Pons |
| 2021-09-29 | soc/intel/{cnl,jsl,tgl,ehl,adl}: rename PMC device init/enable callbacks | Michael Niewöhner |
| 2021-09-29 | soc/intel/alderlake: Add GFx Device ID 0x46c3 | Selma Bensaid |
| 2021-09-29 | soc/intel/alderlake: Add ADLP 242 power configurations | Tracy Wu |
| 2021-09-29 | soc/intel/alderlake: Add support for power cycle and SLP signal duration | Tim Wawrzynczak |
| 2021-09-25 | soc/intel/alderlake: Use intel_microcode_find() to locate ucode.bin | Subrata Banik |
| 2021-09-24 | soc/intel/alderlake: Switch to using device pointers | Furquan Shaikh |
| 2021-09-24 | soc/intel/alderlake: add MaxDramSpeed config | Casper Chang |
| 2021-09-23 | mb/google/brya: Migrate brya to use SPD files under spd/ | Reka Norman |
| 2021-09-22 | soc/intel/alderlake: Drop unused HECI_DISABLE_USING_SMM Kconfig | Subrata Banik |
| 2021-09-20 | soc/intel/{common,tgl,adl}: guard TME Kconfig option by SoC support | Michael Niewöhner |
| 2021-09-16 | vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main | Hsuan Ting Chen |
| 2021-09-16 | drivers/intel/fsp2_0: Refactor MultiPhaseSiInit API calling method | Subrata Banik |
| 2021-09-16 | soc/intel/alderlake: Select SOC_INTEL_COMMON_BLOCK_TCSS at SoC level | Subrata Banik |
| 2021-09-16 | soc/intel/alderlake: Add igd device | Wisley Chen |
| 2021-09-10 | soc/intel/alderlake: Align board type as per FSP v2347_00 | Ronak Kanabar |
| 2021-09-10 | soc/intel/alderlake: Switch to runtime generation of Intel Power Engine | Tim Wawrzynczak |
| 2021-09-10 | soc/intel/alderlake: Set LpmStateEnableMask UPD | Tim Wawrzynczak |
| 2021-09-10 | soc/intel/alderlake: Add get_adl_cpu_type function | Tim Wawrzynczak |
| 2021-09-09 | soc/intel/alderlake: Change VBOOT_HASH_BLOCK_SIZE to 4 KiB | MAULIK V VAGHELA |
| 2021-09-09 | soc/intel/alderlake: Enable Irms UPD for ADL | Ronak Kanabar |
| 2021-09-08 | cpu/x86/tsc: Deduplicate Makefile logic | Angel Pons |
| 2021-09-06 | soc/intel/adl: Move USB4 hotplug Kconfig to common | Furquan Shaikh |
| 2021-09-05 | soc/intel/alderlake: Add tpch device information under dptf | Sumeet Pawnikar |
| 2021-09-03 | soc/intel/alderlake: set power limits dynamically for thermal | Sumeet Pawnikar |
| 2021-09-01 | soc/intel/alderlake: Fix processor hang while plug unplug of TBT device | Sugnan Prabhu S |
| 2021-08-26 | soc/intel/alderlake: Lock PAM registers in finalize | Tim Wawrzynczak |
| 2021-08-20 | soc/intel/adl: Update power limits for ADL-M SKU | Sumeet Pawnikar |
| 2021-08-20 | soc/intel/adl: Update PCI ID for ADL-M SKU | Sumeet Pawnikar |
| 2021-08-19 | soc/intel/alderlake: Move INTEL_CAR_NEM selection from SoC to mainboard | Subrata Banik |
| 2021-08-19 | soc/intel/alderlake: set default PL4 values for different SKUs | Sumeet Pawnikar |
| 2021-08-16 | soc/intel/alderlake: Create eNEM Kconfig for Alder Lake | Subrata Banik |
| 2021-08-12 | soc/intel/alderlake: Clean up FSP chipset lockdown configuration | Felix Singer |
| 2021-08-12 | soc/intel/alderlake: Configure the SKU specific parameters for VR domains | V Sowmya |
| 2021-08-12 | soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL | V Sowmya |
| 2021-08-11 | soc/intel/alderlake: Implement report_cache_info() function | Subrata Banik |
| 2021-08-10 | mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cb | MAULIK V VAGHELA |
| 2021-08-05 | soc/intel/alderlake: Add GFx Device ID 0x46aa | Bora Guvendik |
| 2021-08-04 | Move post_codes.h to commonlib/console/ | Ricardo Quesada |
| 2021-08-03 | soc/intel/*: Allow configuring 8254 timer via CMOS | Sean Rhodes |
| 2021-07-28 | util/spd_tools/lp4x: Add new memory parts and generate SPDs | David Wu |
| 2021-07-26 | src/*: Specify type of `CBFS_SIZE` once | Angel Pons |
| 2021-07-20 | soc/intel/alderlake: Add support for I2C6 and I2C7 | Varshit B Pandya |
| 2021-07-19 | soc/intel/common: Rename kconfig PMC_EPOC | Lean Sheng Tan |
| 2021-07-17 | soc/intel/alderlake: Select INTEL_GMA_OPREGION_2_1 | Meera Ravindranath |
| 2021-07-17 | soc/intel/alderlake: Make use of `cpu/intel/cpu_ids.h' | Subrata Banik |
| 2021-07-15 | soc/intel/alderlake: Add virtual GPIOs for community 1 | Maulik V Vaghela |
| 2021-07-15 | soc/intel/alderlake: Use `is_devfn_enabled()` for Crashlog UPDs | Subrata Banik |
| 2021-07-14 | soc/intel/alderlake: Add GFx Device ID 0x46a6 | Maulik V Vaghela |
| 2021-07-13 | soc/intel/alderlake: Implement WA for DDR5 DIMM modules | Meera Ravindranath |
| 2021-07-13 | soc/intel/alderlake: Add (and fix) devices in IRQ table | Tim Wawrzynczak |
| 2021-07-12 | soc/intel/alderlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 8KB | Subrata Banik |
| 2021-07-12 | soc/intel/alderlake: Add missing devices to pci_devs.h | Tim Wawrzynczak |
| 2021-07-12 | soc/intel/alderlake: Set max Pkg C-states to Auto | V Sowmya |
| 2021-07-08 | soc/intel/alderlake: Avoid NULL pointer deference | John Zhao |
| 2021-07-05 | soc/intel/alderlake: Add support to update the FIVR configs | V Sowmya |
| 2021-07-05 | soc/intel/alderlake: Correct Bus and Device of Touch Host Controller | Varshit B Pandya |
| 2021-07-02 | src: Introduce `ARCH_ALL_STAGES_X86` | Angel Pons |
| 2021-07-02 | soc/intel/alderlake: Add USB TCSS enablement | Bernardo Perez Priego |
| 2021-07-01 | soc/intel/alderlake: Enable energy efficiency turbo mode | V Sowmya |
| 2021-07-01 | soc/intel: Refactor `xdci_can_enable()` function | Angel Pons |
| 2021-07-01 | soc/intel/alderlake: Select VBOOT_X86_SHA256_ACCELERATION config | Subrata Banik |
| 2021-06-30 | soc/intel/alderlake: Send End-of-Post message to CSE | Tim Wawrzynczak |
| 2021-06-30 | soc/intel/common: Move PMC EPOC related code to Intel common code | Lean Sheng Tan |
| 2021-06-30 | src: Move `select ARCH_X86` to platforms | Angel Pons |
| 2021-06-29 | soc/intel/alderlake: Enable support for common IRQ block | Tim Wawrzynczak |
| 2021-06-28 | soc/intel: Drop casts around `soc_read_pmc_base()` | Angel Pons |
| 2021-06-25 | soc/intel/alderlake: Fix the typo for FSP_S_CONFIG param | V Sowmya |
| 2021-06-25 | soc/intel/alderlake: Update s0ix cstate table | Bernardo Perez Priego |
| 2021-06-24 | soc/intel/alderlake: Update mainboard_memory_init_params() argument | Subrata Banik |
| 2021-06-24 | soc/intel/alderlake: Refactor soc_silicon_init_params function | Subrata Banik |
| 2021-06-24 | soc/intel/alderlake: Rename FSP_S_CONFIG variable from params to s_cfg | Subrata Banik |
| 2021-06-24 | soc/intel/alderlake: Refactor platform_fsp_silicon_init_params_cb function | Subrata Banik |
| 2021-06-23 | soc/intel/alderlake: Use devfn_disable() function for XDCI | Subrata Banik |
| 2021-06-21 | soc/intel/alderlake: Add GFx Device ID 0x46b3 | Meera Ravindranath |
| 2021-06-18 | soc/intel/alderlake: Add TBT PCIe root ports enablement | Bernardo Perez Priego |
| 2021-06-17 | soc/intel/{alderlake,tigerlake}: Fix typo in pmc.h | Werner Zeh |
| 2021-06-17 | soc/intel/alderlake/romstage: Refactor soc_memory_init_params function | Subrata Banik |
| 2021-06-16 | soc/intel/alderlake/romstage: Update display UPDs based on InternalGfx | Subrata Banik |
| 2021-06-16 | soc/intel/alderlake: Make use of is_devfn_enabled() function | Subrata Banik |
| 2021-06-11 | soc/intel/{common,alderlake}: Use generic name "Alderlake Platform" | Sridhar Siricilla |
| 2021-06-08 | soc/intel/alderlake/romstage: Drop ineffective FSP-M UPD `ChHashMask` | Subrata Banik |
| 2021-06-08 | soc/intel/alderlake: Set SaIpuEnable UPD according to devicetree | Tim Wawrzynczak |
| 2021-06-08 | soc/intel: Add Alder Lake's GT device ID | Sridhar Siricilla |
| 2021-06-08 | soc/intel/alderlake: Correct TCSS XHCI Port status offset | Sridhar Siricilla |
| 2021-06-07 | cpu/x86: Default to PARALLEL_MP selected | Kyösti Mälkki |
| 2021-06-07 | soc/intel/adl: Add SKU specific power limits support | Sumeet Pawnikar |
| 2021-06-07 | soc/intel/alderlake: Update ACPI device ID of IOM | Maulik V Vaghela |
| 2021-06-07 | soc/intel: Drop unused lpss functions | Furquan Shaikh |
| 2021-06-07 | soc/intel/alderlake: Set Base Addresses for TBT DMA remapping engines | Sridhar Siricilla |
