index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
alderlake
Age
Commit message (
Expand
)
Author
2020-10-14
soc/intel/alderlake: Enable TME for Alder Lake
Subrata Banik
2020-10-08
soc/intel: Make use of common gfx.asl
Subrata Banik
2020-10-06
soc/intel/alderlake/ramstage: Fix compilation issue
Subrata Banik
2020-10-06
soc/intel/alderlake/acpi: Add SoC ACPI directory for ADL
Subrata Banik
2020-10-05
soc/intel: remove duplicate weak versions of mainboard_get_dram_part_num()
Nick Vaccaro
2020-10-05
soc: move mainboard_get_dram_part_num prototype to memory_info.h
Nick Vaccaro
2020-10-05
mb, soc: change mainboard_get_dram_part_num() prototype
Nick Vaccaro
2020-10-03
soc/intel/alderlake/ramstage: Do initial SoC commit till ramstage
Subrata Banik
2020-10-02
drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES config
Shelley Chen
2020-09-27
soc/intel/alderlake: Add GPIOs for Alder Lake SOC
Subrata Banik
2020-09-24
soc/intel/alderlake: Select ACPI_INTEL_HARDWARE_SLEEP_VALUES
Angel Pons
2020-09-24
soc/intel/alderlake/romstage: Fix compilation issue
Subrata Banik
2020-09-22
Revert "soc/intel: Refactor do_global_reset() function"
Furquan Shaikh
2020-09-21
soc/intel: Refactor do_global_reset() function
Subrata Banik
2020-09-19
soc/intel/common/block/cse: Refactor cse_request_global_reset() function
Subrata Banik
2020-09-15
soc/intel/alderlake/romstage: Do initial SoC commit till romstage
Subrata Banik
2020-09-10
soc/intel/alderlake: Rename pch_init() code
Subrata Banik
2020-09-09
vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332
Subrata Banik
2020-09-05
soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock
Subrata Banik