coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-08-26	soc/intel/alderlake: Lock PAM registers in finalize	Tim Wawrzynczak
2021-08-20	soc/intel/adl: Update power limits for ADL-M SKU	Sumeet Pawnikar
2021-08-20	soc/intel/adl: Update PCI ID for ADL-M SKU	Sumeet Pawnikar
2021-08-19	soc/intel/alderlake: Move INTEL_CAR_NEM selection from SoC to mainboard	Subrata Banik
2021-08-19	soc/intel/alderlake: set default PL4 values for different SKUs	Sumeet Pawnikar
2021-08-16	soc/intel/alderlake: Create eNEM Kconfig for Alder Lake	Subrata Banik
2021-08-12	soc/intel/alderlake: Clean up FSP chipset lockdown configuration	Felix Singer
2021-08-12	soc/intel/alderlake: Configure the SKU specific parameters for VR domains	V Sowmya
2021-08-12	soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL	V Sowmya
2021-08-11	soc/intel/alderlake: Implement report_cache_info() function	Subrata Banik
2021-08-10	mb/*/{brya,adlrvp}: move cpu_cluster static configuration to chipset.cb	MAULIK V VAGHELA
2021-08-05	soc/intel/alderlake: Add GFx Device ID 0x46aa	Bora Guvendik
2021-08-04	Move post_codes.h to commonlib/console/	Ricardo Quesada
2021-08-03	soc/intel/*: Allow configuring 8254 timer via CMOS	Sean Rhodes
2021-07-28	util/spd_tools/lp4x: Add new memory parts and generate SPDs	David Wu
2021-07-26	src/*: Specify type of `CBFS_SIZE` once	Angel Pons
2021-07-20	soc/intel/alderlake: Add support for I2C6 and I2C7	Varshit B Pandya
2021-07-19	soc/intel/common: Rename kconfig PMC_EPOC	Lean Sheng Tan
2021-07-17	soc/intel/alderlake: Select INTEL_GMA_OPREGION_2_1	Meera Ravindranath
2021-07-17	soc/intel/alderlake: Make use of `cpu/intel/cpu_ids.h'	Subrata Banik
2021-07-15	soc/intel/alderlake: Add virtual GPIOs for community 1	Maulik V Vaghela
2021-07-15	soc/intel/alderlake: Use `is_devfn_enabled()` for Crashlog UPDs	Subrata Banik
2021-07-14	soc/intel/alderlake: Add GFx Device ID 0x46a6	Maulik V Vaghela
2021-07-13	soc/intel/alderlake: Implement WA for DDR5 DIMM modules	Meera Ravindranath
2021-07-13	soc/intel/alderlake: Add (and fix) devices in IRQ table	Tim Wawrzynczak
2021-07-12	soc/intel/alderlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 8KB	Subrata Banik
2021-07-12	soc/intel/alderlake: Add missing devices to pci_devs.h	Tim Wawrzynczak
2021-07-12	soc/intel/alderlake: Set max Pkg C-states to Auto	V Sowmya
2021-07-08	soc/intel/alderlake: Avoid NULL pointer deference	John Zhao
2021-07-05	soc/intel/alderlake: Add support to update the FIVR configs	V Sowmya
2021-07-05	soc/intel/alderlake: Correct Bus and Device of Touch Host Controller	Varshit B Pandya
2021-07-02	src: Introduce `ARCH_ALL_STAGES_X86`	Angel Pons
2021-07-02	soc/intel/alderlake: Add USB TCSS enablement	Bernardo Perez Priego
2021-07-01	soc/intel/alderlake: Enable energy efficiency turbo mode	V Sowmya
2021-07-01	soc/intel: Refactor `xdci_can_enable()` function	Angel Pons
2021-07-01	soc/intel/alderlake: Select VBOOT_X86_SHA256_ACCELERATION config	Subrata Banik
2021-06-30	soc/intel/alderlake: Send End-of-Post message to CSE	Tim Wawrzynczak
2021-06-30	soc/intel/common: Move PMC EPOC related code to Intel common code	Lean Sheng Tan
2021-06-30	src: Move `select ARCH_X86` to platforms	Angel Pons
2021-06-29	soc/intel/alderlake: Enable support for common IRQ block	Tim Wawrzynczak
2021-06-28	soc/intel: Drop casts around `soc_read_pmc_base()`	Angel Pons
2021-06-25	soc/intel/alderlake: Fix the typo for FSP_S_CONFIG param	V Sowmya
2021-06-25	soc/intel/alderlake: Update s0ix cstate table	Bernardo Perez Priego
2021-06-24	soc/intel/alderlake: Update mainboard_memory_init_params() argument	Subrata Banik
2021-06-24	soc/intel/alderlake: Refactor soc_silicon_init_params function	Subrata Banik
2021-06-24	soc/intel/alderlake: Rename FSP_S_CONFIG variable from params to s_cfg	Subrata Banik
2021-06-24	soc/intel/alderlake: Refactor platform_fsp_silicon_init_params_cb function	Subrata Banik
2021-06-23	soc/intel/alderlake: Use devfn_disable() function for XDCI	Subrata Banik
2021-06-21	soc/intel/alderlake: Add GFx Device ID 0x46b3	Meera Ravindranath
2021-06-18	soc/intel/alderlake: Add TBT PCIe root ports enablement	Bernardo Perez Priego
2021-06-17	soc/intel/{alderlake,tigerlake}: Fix typo in pmc.h	Werner Zeh
2021-06-17	soc/intel/alderlake/romstage: Refactor soc_memory_init_params function	Subrata Banik
2021-06-16	soc/intel/alderlake/romstage: Update display UPDs based on InternalGfx	Subrata Banik
2021-06-16	soc/intel/alderlake: Make use of is_devfn_enabled() function	Subrata Banik
2021-06-11	soc/intel/{common,alderlake}: Use generic name "Alderlake Platform"	Sridhar Siricilla
2021-06-08	soc/intel/alderlake/romstage: Drop ineffective FSP-M UPD `ChHashMask`	Subrata Banik
2021-06-08	soc/intel/alderlake: Set SaIpuEnable UPD according to devicetree	Tim Wawrzynczak
2021-06-08	soc/intel: Add Alder Lake's GT device ID	Sridhar Siricilla
2021-06-08	soc/intel/alderlake: Correct TCSS XHCI Port status offset	Sridhar Siricilla
2021-06-07	cpu/x86: Default to PARALLEL_MP selected	Kyösti Mälkki
2021-06-07	soc/intel/adl: Add SKU specific power limits support	Sumeet Pawnikar
2021-06-07	soc/intel/alderlake: Update ACPI device ID of IOM	Maulik V Vaghela
2021-06-07	soc/intel: Drop unused lpss functions	Furquan Shaikh
2021-06-07	soc/intel/alderlake: Set Base Addresses for TBT DMA remapping engines	Sridhar Siricilla
2021-06-05	soc/intel/alderlake: Add IDE-R and KT device into chipset.cb	Subrata Banik
2021-06-04	soc/intel/alderlake: Add PMC ACPI interface	Tim Wawrzynczak
2021-06-03	soc/intel/alderlake: Add new memory parts for ADL boards	Amanda Huang
2021-05-30	soc/intel/alderlake: Add placeholder SPD file	Tim Wawrzynczak
2021-05-26	soc/intel/alderlake: Update soundwire master count	Sugnan Prabhu S
2021-05-26	soc/intel/alderlake: Add validity for TBT firmware authentication	John Zhao
2021-05-25	soc/intel/alderlake: Fix SA_DEVFN_CPU_PCIE6_*	Tim Wawrzynczak
2021-05-21	soc/intel/common: Add Alder Lake device IDs	Sumeet R Pawnikar
2021-05-18	soc/intel/alderlake: Add handling of GPIO_COM3 in gpio.asl	Maulik V Vaghela
2021-05-18	cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y	Arthur Heymans
2021-05-18	soc/intel/alderlake: mb/intel/sm: Add tcss code	Deepti Deshatty
2021-05-16	soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards	Bora Guvendik
2021-05-16	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2162_00	Ronak Kanabar
2021-05-14	soc/intel/alderlake: Update CPU and IGD Device IDs	Maulik V Vaghela
2021-05-14	soc/intel/alderlake: Add known GPIO virtual wire information	Deepti Deshatty
2021-05-14	soc/intel/alderlake: Add known CPU Port IDs for GPIO communities	Deepti Deshatty
2021-05-14	soc/intel/alderlake: Add IOM PCR PID	Deepti Deshatty
2021-05-13	src: Match array format in function declarations and definitions	Patrick Georgi
2021-05-10	soc/intel/adl: Allow mainboard to fill CmdMirror and DqDqsRetraining	Maulik V Vaghela
2021-05-07	soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXIT	Kane Chen
2021-05-07	soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmaster	Kane Chen
2021-05-06	soc/intel/alderlake: Add CrashLog implementation for Intel ADL	Francois Toguo
2021-05-05	soc/intel/alderlake: Add GPIO definition for CPU PCIe vGPIO	Maulik V Vaghela
2021-05-04	soc/intel/alderlake: remove duplicate PL2 override	Sumeet R Pawnikar
2021-05-03	soc/intel/: Update data types for variables holding PCH_DEVFN_ macros	Tim Wawrzynczak
2021-05-03	device: Switch pci_dev_is_wake_source to take pci_devfn_t	Tim Wawrzynczak
2021-05-03	soc/intel/alderlake: Enable HWP CPPC support in CB	ravindr1
2021-05-03	soc/intel/alderlake: Fill FSPM UPDs for VT-d configuration	Meera Ravindranath
2021-04-26	soc/intel/alderlake: Use device ID from pci_devs header file	John Zhao
2021-04-26	soc/intel/alderlake: Fix devices list in the DMAR DRHD structure	John Zhao
2021-04-23	soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoC	Sumeet R Pawnikar
2021-04-22	soc/intel/alderlake: Add enum for HDA audio configuration	Sugnan Prabhu S
2021-04-22	soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.h	Furquan Shaikh
2021-04-21	soc/intel/alderlake: Drop unused `PrmrrSize` from devicetree	Angel Pons
2021-04-21	soc/intel: Replace open-coded buffer length calculation	Angel Pons
2021-04-21	soc/intel/alderlake: Enable PCIE RTD3 driver	Rizwan Qureshi