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path: root/src/soc/intel/alderlake
AgeCommit message (Expand)Author
2020-11-23soc/intel/alderlake: Update UART0 GPIO as per latest schematicsSubrata Banik
2020-11-23soc/intel/alderlake: Update DCACHE_BSP_STACK_SIZE and DCACHE_RAM_SIZESubrata Banik
2020-11-22soc/intel/alderlake: Fix overlapping memory address used for early GSPI2 and ...Bora Guvendik
2020-11-20soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPDMichael Niewöhner
2020-11-12soc/intel/alderlake: Add PCH ID 0x5181Subrata Banik
2020-11-07mb/intel: Enable ALC711 Audio codec over SNDW0 linkSridhar Siricilla
2020-11-03soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical orderSubrata Banik
2020-11-02soc/intel: Use of common reset code blockSubrata Banik
2020-10-29mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'Subrata Banik
2020-10-28soc/intel: deduplicate ACPI timer emulationMichael Niewöhner
2020-10-26mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner
2020-10-26soc/intel: drop unneeded ISST configuration codeMichael Niewöhner
2020-10-25soc/intel/alderlake/romstage: Skip GPIO configuration from FSPSubrata Banik
2020-10-24{cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner
2020-10-21soc/intel: convert XTAL frequency constant to KconfigMichael Niewöhner
2020-10-21soc/intel/common: add Kconfig for PM Timer emulation supportMichael Niewöhner
2020-10-19soc/intel/*: drop useless XTAL shutdown qualification codeMichael Niewöhner
2020-10-17cpu/intel,soc/intel: drop Kconfig for hyperthreadingMichael Niewöhner
2020-10-14soc/intel/alderlake: Enable TME for Alder LakeSubrata Banik
2020-10-08soc/intel: Make use of common gfx.aslSubrata Banik
2020-10-06soc/intel/alderlake/ramstage: Fix compilation issueSubrata Banik
2020-10-06soc/intel/alderlake/acpi: Add SoC ACPI directory for ADLSubrata Banik
2020-10-05soc/intel: remove duplicate weak versions of mainboard_get_dram_part_num()Nick Vaccaro
2020-10-05soc: move mainboard_get_dram_part_num prototype to memory_info.hNick Vaccaro
2020-10-05mb, soc: change mainboard_get_dram_part_num() prototypeNick Vaccaro
2020-10-03soc/intel/alderlake/ramstage: Do initial SoC commit till ramstageSubrata Banik
2020-10-02drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen
2020-09-27soc/intel/alderlake: Add GPIOs for Alder Lake SOCSubrata Banik
2020-09-24soc/intel/alderlake: Select ACPI_INTEL_HARDWARE_SLEEP_VALUESAngel Pons
2020-09-24soc/intel/alderlake/romstage: Fix compilation issueSubrata Banik
2020-09-22Revert "soc/intel: Refactor do_global_reset() function"Furquan Shaikh
2020-09-21soc/intel: Refactor do_global_reset() functionSubrata Banik
2020-09-19soc/intel/common/block/cse: Refactor cse_request_global_reset() functionSubrata Banik
2020-09-15soc/intel/alderlake/romstage: Do initial SoC commit till romstageSubrata Banik
2020-09-10soc/intel/alderlake: Rename pch_init() codeSubrata Banik
2020-09-09vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332Subrata Banik
2020-09-05soc/intel/alderlake/bootblock: Do initial SoC commit till bootblockSubrata Banik