| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-01-30 | soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options | Angel Pons |
| 2020-10-03 | soc/intel/alderlake/ramstage: Do initial SoC commit till ramstage | Subrata Banik |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |