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Update api name and comments to be more generic as spi destination
id is not DMI specific.
Update api name as soc_get_spi_psf_destination_id and comments.
And move PSF definition from pcr_ids.h as it's not pcr id.
Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: Ie338d05649d23bddae5355dc6ce8440dfb183073
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
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Port commit 237afda (src/soc/intel/tigerlake: Add SPI DMI Destination ID)
into Alderlake.
Change-Id: Ia0b465d405ab3c70b7d4094d32c182cab30fe531
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48754
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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List of changes:
1. Add required SoC programming till ramstage
2. Include only required headers into include/soc
3. Add CPU, PCH and SA EDS document number and chapter number
4. Fill required FSP-S UPD to call FSP-S API
Change-Id: I3394f585d66b14ece67cde9e45ffa1177406f35f
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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