coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-03-02	mb, soc: Add the SPD_CACHE_ENABLE	Zhuohao Lee
2022-02-25	mb, soc: change mainboard_memory_init_params prototype	Zhuohao Lee
2022-02-25	arch/x86: factor out and commonize HPET_BASE_ADDRESS definition	Felix Held
2022-02-21	soc/intel/alderlake: Enable eMMC based on dev enabled	Krishna Prasad Bhat
2022-02-09	soc/intel/alderlake: Define USB2_PORT_MAX_TYPE_C macro	Sridhar Siricilla
2022-02-04	soc/intel/alderlake: Enable USB2 port reset message on Type-C ports	Anil Kumar
2022-02-01	soc/intel/alderlake: Add eMMC PCR Port ID for Alder Lake N	Krishna Prasad Bhat
2022-02-01	soc/intel/alderlake: Add GPP_I GPIO group for Alder Lake N SOC	Krishna Prasad Bhat
2022-01-31	soc/intel/adl: Update devicetree based on remapping for TBT PCIe	MAULIK V VAGHELA
2022-01-26	soc/intel/alderlake: Add GPIO Controller device ID for ADL-N	Usha P
2022-01-19	soc/intel/common/cpu: Use SoC overrides to get CPU privilege level	Subrata Banik
2022-01-19	soc/intel/alderlake: Rework the GPIO PAD Pin numbers	Subrata Banik
2022-01-11	soc/intel/alderlake: Factor out A0 stepping workaround	Angel Pons
2022-01-02	soc/intel/{adl,ehl,tgl}: Rename spi_protection_mode to mfg_mode	Subrata Banik
2022-01-01	src: Drop duplicated includes	Elyes HAOUAS
2021-12-09	soc/intel/alderlake: Fix value of SA_DEVFN_CPU_PCIE1_0	Tim Wawrzynczak
2021-12-06	soc/intel/alderlake: Add support for ADL-N CPU Type	Usha P
2021-12-03	soc/intel/alderlake: Add support for ADL-N PCH	Usha P
2021-12-02	soc/intel/alderlake: Add Kconfigs for all PCH types	Angel Pons
2021-10-26	soc/intel/alderlake: set lock offset for gpio pad communities	Nick Vaccaro
2021-10-26	soc/intel: Update api name for getting spi destination id	Wonkyu Kim
2021-09-10	soc/intel/alderlake: Align board type as per FSP v2347_00	Ronak Kanabar
2021-09-10	soc/intel/alderlake: Set LpmStateEnableMask UPD	Tim Wawrzynczak
2021-09-10	soc/intel/alderlake: Add get_adl_cpu_type function	Tim Wawrzynczak
2021-08-12	soc/intel/alderlake: Configure the SKU specific parameters for VR domains	V Sowmya
2021-07-20	soc/intel/alderlake: Add support for I2C6 and I2C7	Varshit B Pandya
2021-07-15	soc/intel/alderlake: Add virtual GPIOs for community 1	Maulik V Vaghela
2021-07-12	soc/intel/alderlake: Add missing devices to pci_devs.h	Tim Wawrzynczak
2021-07-05	soc/intel/alderlake: Correct Bus and Device of Touch Host Controller	Varshit B Pandya
2021-06-30	soc/intel/common: Move PMC EPOC related code to Intel common code	Lean Sheng Tan
2021-06-29	soc/intel/alderlake: Enable support for common IRQ block	Tim Wawrzynczak
2021-06-24	soc/intel/alderlake: Update mainboard_memory_init_params() argument	Subrata Banik
2021-06-17	soc/intel/{alderlake,tigerlake}: Fix typo in pmc.h	Werner Zeh
2021-05-26	soc/intel/alderlake: Add validity for TBT firmware authentication	John Zhao
2021-05-25	soc/intel/alderlake: Fix SA_DEVFN_CPU_PCIE6_*	Tim Wawrzynczak
2021-05-18	soc/intel/alderlake: mb/intel/sm: Add tcss code	Deepti Deshatty
2021-05-14	soc/intel/alderlake: Add known CPU Port IDs for GPIO communities	Deepti Deshatty
2021-05-14	soc/intel/alderlake: Add IOM PCR PID	Deepti Deshatty
2021-05-10	soc/intel/adl: Allow mainboard to fill CmdMirror and DqDqsRetraining	Maulik V Vaghela
2021-05-06	soc/intel/alderlake: Add CrashLog implementation for Intel ADL	Francois Toguo
2021-05-05	soc/intel/alderlake: Add GPIO definition for CPU PCIe vGPIO	Maulik V Vaghela
2021-04-16	soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OC	Maulik V Vaghela
2021-03-27	soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h	Subrata Banik
2021-03-27	soc/intel/alderlake: Correct GPE DWx assignment as per EDS	Subrata Banik
2021-03-26	soc/intel/alderlake: Add provision to override Rcomp settings	Subrata Banik
2021-03-26	soc/intel/alderlake: Align RcompResistor definition as per MRC	Subrata Banik
2021-03-15	soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI device	Cliff Huang
2021-03-03	soc/intel/alderlake: Add some helper macros for accessing TCSS DMA devices	Tim Wawrzynczak
2021-03-01	soc/intel: Drop `bootblock_cpu_init()` function	Angel Pons
2021-03-01	soc/intel: Drop `romstage_pch_init()` function	Angel Pons
2021-03-01	soc/intel: Factor out common smbus.h	Angel Pons
2021-03-01	soc/intel: Factor out common gpe.h	Angel Pons
2021-02-17	soc/intel/alderlake: Fix PCI IRQ tables	Tim Wawrzynczak
2021-02-16	soc/intel: Drop aliases on MMCONF_BASE_ADDRESS	Kyösti Mälkki
2021-01-30	soc/intel/alderlake: Remove pch.h from SoC directory	Subrata Banik
2021-01-25	soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driver	Furquan Shaikh
2021-01-18	soc/intel/alderlake: Update PCH and CPU PCIe RP table	Eric Lai
2020-12-23	soc/intel/alderlake: Add SPI DMI Destination ID	Subrata Banik
2020-11-29	soc/intel/alderlake: Add lp5_ccc_config to the board memory configuration	Sridhar Siricilla
2020-10-29	mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'	Subrata Banik
2020-10-24	{cpu,soc}/intel: deduplicate cpu code	Michael Niewöhner
2020-10-21	soc/intel: convert XTAL frequency constant to Kconfig	Michael Niewöhner
2020-10-06	soc/intel/alderlake/ramstage: Fix compilation issue	Subrata Banik
2020-10-05	soc: move mainboard_get_dram_part_num prototype to memory_info.h	Nick Vaccaro
2020-10-05	mb, soc: change mainboard_get_dram_part_num() prototype	Nick Vaccaro
2020-10-03	soc/intel/alderlake/ramstage: Do initial SoC commit till ramstage	Subrata Banik
2020-09-27	soc/intel/alderlake: Add GPIOs for Alder Lake SOC	Subrata Banik
2020-09-15	soc/intel/alderlake/romstage: Do initial SoC commit till romstage	Subrata Banik
2020-09-10	soc/intel/alderlake: Rename pch_init() code	Subrata Banik
2020-09-05	soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock	Subrata Banik