coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-03-14	soc/intel/alderlake: Add EPP override support	Cliff Huang
2022-03-09	drivers/wifi,soc/intel/adl: Move CnviDdrRfim property to drivers	Tim Wawrzynczak
2022-03-07	src: Make PCI ID define names shorter	Felix Singer
2022-02-21	soc/intel/alderlake: Enable eMMC based on dev enabled	Krishna Prasad Bhat
2022-01-25	soc/intel/adl: Replace dt `HeciEnabled` by `HECI1 disable` config	Subrata Banik
2022-01-21	soc/intel/alderlake: Add ADL-P 2+8+2 (28W) VR config	Curtis Chen
2022-01-10	soc/intel/alderlake: Update the ADL-P SKU parameters for VR domains	Curtis Chen
2021-12-03	soc/intel/alderlake: Add the CnviDdrRfim configuration	Ronak Kanabar
2021-11-25	soc/intel/alderlake: Add ADLP 4+4+2 power configurations	Curtis Chen
2021-11-18	soc/intel/alderlake: Add Acoustic noise mitigation UPDs	Wisley Chen
2021-11-09	soc/intel/alderlake: Enable Intel FIVR RFI settings	Wisley Chen
2021-10-12	soc/intel: replace dt option PmTimerDisabled by Kconfig	Michael Niewöhner
2021-10-04	src/soc/intel/alderlake: Add PsysPmax setting	Ryan Lin
2021-10-01	soc/intel/alderlake: add power limits for Alder Lake-M 282 SKU	Sumeet Pawnikar
2021-09-29	soc/intel/alderlake: Add ADLP 242 power configurations	Tracy Wu
2021-09-29	soc/intel/alderlake: Add support for power cycle and SLP signal duration	Tim Wawrzynczak
2021-09-24	soc/intel/alderlake: add MaxDramSpeed config	Casper Chang
2021-09-10	soc/intel/alderlake: Set LpmStateEnableMask UPD	Tim Wawrzynczak
2021-09-03	soc/intel/alderlake: set power limits dynamically for thermal	Sumeet Pawnikar
2021-08-20	soc/intel/adl: Update power limits for ADL-M SKU	Sumeet Pawnikar
2021-08-12	soc/intel/alderlake: Configure the SKU specific parameters for VR domains	V Sowmya
2021-07-12	soc/intel/alderlake: Set max Pkg C-states to Auto	V Sowmya
2021-07-05	soc/intel/alderlake: Add support to update the FIVR configs	V Sowmya
2021-06-16	soc/intel/alderlake/romstage: Update display UPDs based on InternalGfx	Subrata Banik
2021-06-07	soc/intel/adl: Add SKU specific power limits support	Sumeet Pawnikar
2021-05-18	soc/intel/alderlake: mb/intel/sm: Add tcss code	Deepti Deshatty
2021-05-04	soc/intel/alderlake: remove duplicate PL2 override	Sumeet R Pawnikar
2021-04-22	soc/intel/alderlake: Add enum for HDA audio configuration	Sugnan Prabhu S
2021-04-22	soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.h	Furquan Shaikh
2021-04-21	soc/intel/alderlake: Drop unused `PrmrrSize` from devicetree	Angel Pons
2021-04-16	soc/intel/alderlake: Allow devicetree to fill UPD related to TCSS OC	Maulik V Vaghela
2021-04-10	soc/intel/alderlake: Drop unreferenced `InternalGfx`	Angel Pons
2021-03-28	soc/intel/alderlake: add processor power limits control support	Sumeet R Pawnikar
2021-03-15	soc/intel/alderlake: Add CNVi Bluetooth flag at devicetree entry	Cliff Huang
2021-03-03	soc/intel: Retype `CnviBtAudioOffload` devicetree option	Angel Pons
2021-02-05	soc/intel/alderlake: Refactor PCIE port config	Eric Lai
2021-02-01	soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQ	Subrata Banik
2021-01-30	soc/intel/alderlake: Remove pch.h from SoC directory	Subrata Banik
2021-01-18	soc/intel/common: Move L1_substates_control to pcie_rp.h	Eric Lai
2021-01-10	soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPs	Subrata Banik
2020-12-14	soc/intel/alderlake: Drop unreferenced devicetree settings	Angel Pons
2020-10-26	mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`	Michael Niewöhner
2020-10-03	soc/intel/alderlake/ramstage: Do initial SoC commit till ramstage	Subrata Banik
2020-09-15	soc/intel/alderlake/romstage: Do initial SoC commit till romstage	Subrata Banik