coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-06-11	soc/intel/{common,alderlake}: Use generic name "Alderlake Platform"	Sridhar Siricilla
2021-06-08	soc/intel: Add Alder Lake's GT device ID	Sridhar Siricilla
2021-05-21	soc/intel/common: Add Alder Lake device IDs	Sumeet R Pawnikar
2021-05-14	soc/intel/alderlake: Update CPU and IGD Device IDs	Maulik V Vaghela
2021-04-06	soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake M	Maulik V Vaghela
2021-03-01	soc/intel: Drop `bootblock_cpu_init()` function	Angel Pons
2021-02-16	soc/intel/{alderlake,apollolake}: Remove unused <string.h>	Elyes HAOUAS
2021-01-31	soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK	Michael Niewöhner
2021-01-30	soc/intel/alderlake: Remove pch.h from SoC directory	Subrata Banik
2021-01-25	soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring	Michael Niewöhner
2021-01-12	soc/intel/alderlake: Add PCH ID 0x5182	Subrata Banik
2020-12-09	soc/intel/common/dmi: Move DMI defines into DMI driver header	Srinidhi N Kaushik
2020-11-29	soc/intel: Configure P2SB before other PCH controllers	Furquan Shaikh
2020-11-12	soc/intel/alderlake: Add PCH ID 0x5181	Subrata Banik
2020-09-10	soc/intel/alderlake: Rename pch_init() code	Subrata Banik
2020-09-05	soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock	Subrata Banik