index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
/
alderlake
/
Makefile.inc
Age
Commit message (
Expand
)
Author
2023-06-23
soc/intel/alderlake/hsphy: Add possibility to cache HSPHY in flash
Michał Żygowski
2023-04-04
soc/intel/alderlake: Add support for CSE timestamp data versions
Bora Guvendik
2023-03-05
soc/intel/alderlake: Hook up ucode for RPL-P/H/U
Tim Crawford
2023-03-02
soc/intel/alderlake: Hook up ucode for RPL-S/HX B0
Tim Crawford
2023-02-24
soc/intel/adl: Select CSE defined ME spec version for alderlake
Dinesh Gehlot
2023-02-23
Revert "soc/intel/adl: Select CSE defined ME spec version for alderlake"
Lean Sheng Tan
2023-02-23
soc/intel/adl: Select CSE defined ME spec version for alderlake
Dinesh Gehlot
2023-02-23
soc/intel: Use common codeflow for MP init
Arthur Heymans
2022-12-25
soc/intel: Move max speed API to common
Dinesh Gehlot
2022-12-23
soc/intel: Drop SoC specific DPTF implementation
Subrata Banik
2022-11-03
soc/intel/alderlake: Hook up GMA ACPI brightness controls
Tim Crawford
2022-10-31
soc: Add SPDX license headers to Makefiles
Martin Roth
2022-10-14
soc/intel/alderlake: Fix unknown max speed in SMBIOS
Zhixing Ma
2022-08-24
soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading
Michał Żygowski
2022-07-08
soc/intel/alderlake: Hook-up public Alder Lake microcode
Michał Żygowski
2022-06-22
soc/intel/alderlake: add GPIO definitions for PCH-S
Michał Kopeć
2022-06-16
soc/intel/alderlake: Unselect USB4 and TCSS options for ADL-S
Michał Żygowski
2022-04-07
soc/intel/alderlake: Add support to update descriptor at runtime
Reka Norman
2022-04-07
soc/intel/alderlake: Remove ALDERLAKE_A0_CONFIG_PMC_DESCRIPTOR Kconfig
Sridhar Siricilla
2022-04-06
soc/intel/common: Abstract the common TCSS functions
John
2022-01-11
soc/intel/alderlake: Factor out A0 stepping workaround
Angel Pons
2021-12-13
soc/intel/alderlake: Implement function to map physical port to EC port
MAULIK V VAGHELA
2021-12-13
soc/intel/alderlake: Define soc_get_pcie_rp_type
Tim Wawrzynczak
2021-12-10
soc/intel/cse: config to enable oem key manifest
Ravindra N
2021-11-15
soc/intel/alderlake: Fix build failure with enabled CSE stitching
Bernardo Perez Priego
2021-11-15
Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"
Hsuan-ting Chen
2021-10-26
cpu/x86: Introduce and use `CPU_X86_LAPIC`
Felix Held
2021-10-25
cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs
Felix Held
2021-10-19
soc/intel/alderlake: Enable support for CSE stitching
Furquan Shaikh
2021-10-15
Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"
Hsuan-ting Chen
2021-09-16
vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main
Hsuan Ting Chen
2021-09-08
cpu/x86/tsc: Deduplicate Makefile logic
Angel Pons
2021-08-12
soc/intel/alderlake: Configure the SKU specific parameters for VR domains
V Sowmya
2021-05-18
cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y
Arthur Heymans
2021-05-06
soc/intel/alderlake: Add CrashLog implementation for Intel ADL
Francois Toguo
2021-04-23
soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoC
Sumeet R Pawnikar
2021-03-30
soc/intel/alderlake: Enable logging of wake sources for S0ix
Sugnan Prabhu S
2021-03-03
soc/intel: Factor out common smmrelocate.c
Angel Pons
2021-03-01
soc/intel: Drop `bootblock_cpu_init()` function
Angel Pons
2021-02-24
soc/intel/alderlake: Add soc_get_xhci_usb_info() for elog support
Tim Wawrzynczak
2021-01-18
soc/intel/alderlake: Update PCH and CPU PCIe RP table
Eric Lai
2020-10-03
soc/intel/alderlake/ramstage: Do initial SoC commit till ramstage
Subrata Banik
2020-09-27
soc/intel/alderlake: Add GPIOs for Alder Lake SOC
Subrata Banik
2020-09-15
soc/intel/alderlake/romstage: Do initial SoC commit till romstage
Subrata Banik
2020-09-05
soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock
Subrata Banik