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path: root/src/soc/intel/alderlake/Makefile.inc
AgeCommit message (Expand)Author
2023-06-23soc/intel/alderlake/hsphy: Add possibility to cache HSPHY in flashMichał Żygowski
2023-04-04soc/intel/alderlake: Add support for CSE timestamp data versionsBora Guvendik
2023-03-05soc/intel/alderlake: Hook up ucode for RPL-P/H/UTim Crawford
2023-03-02soc/intel/alderlake: Hook up ucode for RPL-S/HX B0Tim Crawford
2023-02-24soc/intel/adl: Select CSE defined ME spec version for alderlakeDinesh Gehlot
2023-02-23Revert "soc/intel/adl: Select CSE defined ME spec version for alderlake"Lean Sheng Tan
2023-02-23soc/intel/adl: Select CSE defined ME spec version for alderlakeDinesh Gehlot
2023-02-23soc/intel: Use common codeflow for MP initArthur Heymans
2022-12-25soc/intel: Move max speed API to commonDinesh Gehlot
2022-12-23soc/intel: Drop SoC specific DPTF implementationSubrata Banik
2022-11-03soc/intel/alderlake: Hook up GMA ACPI brightness controlsTim Crawford
2022-10-31soc: Add SPDX license headers to MakefilesMartin Roth
2022-10-14soc/intel/alderlake: Fix unknown max speed in SMBIOSZhixing Ma
2022-08-24soc/intel/alderlake/hsphy: Add support for HSPHY firmware loadingMichał Żygowski
2022-07-08soc/intel/alderlake: Hook-up public Alder Lake microcodeMichał Żygowski
2022-06-22soc/intel/alderlake: add GPIO definitions for PCH-SMichał Kopeć
2022-06-16soc/intel/alderlake: Unselect USB4 and TCSS options for ADL-SMichał Żygowski
2022-04-07soc/intel/alderlake: Add support to update descriptor at runtimeReka Norman
2022-04-07soc/intel/alderlake: Remove ALDERLAKE_A0_CONFIG_PMC_DESCRIPTOR KconfigSridhar Siricilla
2022-04-06soc/intel/common: Abstract the common TCSS functionsJohn
2022-01-11soc/intel/alderlake: Factor out A0 stepping workaroundAngel Pons
2021-12-13soc/intel/alderlake: Implement function to map physical port to EC portMAULIK V VAGHELA
2021-12-13soc/intel/alderlake: Define soc_get_pcie_rp_typeTim Wawrzynczak
2021-12-10soc/intel/cse: config to enable oem key manifestRavindra N
2021-11-15soc/intel/alderlake: Fix build failure with enabled CSE stitchingBernardo Perez Priego
2021-11-15Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"Hsuan-ting Chen
2021-10-26cpu/x86: Introduce and use `CPU_X86_LAPIC`Felix Held
2021-10-25cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCsFelix Held
2021-10-19soc/intel/alderlake: Enable support for CSE stitchingFurquan Shaikh
2021-10-15Revert "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"Hsuan-ting Chen
2021-09-16vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_mainHsuan Ting Chen
2021-09-08cpu/x86/tsc: Deduplicate Makefile logicAngel Pons
2021-08-12soc/intel/alderlake: Configure the SKU specific parameters for VR domainsV Sowmya
2021-05-18cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=yArthur Heymans
2021-05-06soc/intel/alderlake: Add CrashLog implementation for Intel ADLFrancois Toguo
2021-04-23soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoCSumeet R Pawnikar
2021-03-30soc/intel/alderlake: Enable logging of wake sources for S0ixSugnan Prabhu S
2021-03-03soc/intel: Factor out common smmrelocate.cAngel Pons
2021-03-01soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons
2021-02-24soc/intel/alderlake: Add soc_get_xhci_usb_info() for elog supportTim Wawrzynczak
2021-01-18soc/intel/alderlake: Update PCH and CPU PCIe RP tableEric Lai
2020-10-03soc/intel/alderlake/ramstage: Do initial SoC commit till ramstageSubrata Banik
2020-09-27soc/intel/alderlake: Add GPIOs for Alder Lake SOCSubrata Banik
2020-09-15soc/intel/alderlake/romstage: Do initial SoC commit till romstageSubrata Banik
2020-09-05soc/intel/alderlake/bootblock: Do initial SoC commit till bootblockSubrata Banik