Age | Commit message (Expand) | Author |
2015-06-24 | Remove address from GPLv2 headers | Patrick Georgi |
2015-06-21 | Remove old HAVE_UART_MEMORY_MAPPED select statements | Martin Roth |
2015-06-12 | pistachio: add DDR3 initialization code | Ionela Voinescu |
2015-06-12 | pistachio: Use passive windowing as DQS gating scheme | Ionela Voinescu |
2015-06-10 | pistachio: sort included header files | Ionela Voinescu |
2015-06-10 | pistachio: initialize cbmem area to be empty | Ionela Voinescu |
2015-06-09 | pistachio: increase romstage size | Ionela Voinescu |
2015-06-02 | Revert "pistashio: bump up romstage size" | Aaron Durbin |
2015-05-26 | pistashio: bump up romstage size | Aaron Durbin |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-05-19 | Remove Kconfig variable that has no effect | Patrick Georgi |
2015-05-07 | imgtec/pistachio: Add comment on the unusual memory layout | Patrick Georgi |
2015-04-30 | imgtech/pistachio: Give some more space to the bootblock | Patrick Georgi |
2015-04-29 | kbuild: automatically include SOCs | Stefan Reinauer |
2015-04-22 | imgtec/pistachio: DDR reads return to controller with no bubbles | Ionela Voinescu |
2015-04-22 | imgtec/pistachio: DDR row/bank/column mapping | Ionela Voinescu |
2015-04-22 | soc: select generic gpio lib on (almost) all non-x86 SOCs | Stefan Reinauer |
2015-04-22 | imgtec/pistachio: increase RAM CBFS cache size | Vadim Bendebury |
2015-04-21 | pistachio: Remove 50% DDR bandwidth restriction | Ionela Voinescu |
2015-04-21 | pistachio: Decrease DDR ODT from 75R to 50R | Ionela Voinescu |
2015-04-21 | pistachio: clean DDR2 initialization code | Ionela Voinescu |
2015-04-21 | pistachio: add clock setup for all I2C interfaces | Ionela Voinescu |
2015-04-21 | urara: Identity map DRAM/SRAM | Andrew Bresticker |
2015-04-21 | imgtec/pistachio: Add spi_crop_chunk() | Patrick Georgi |
2015-04-17 | pistachio: Move console UART to a Kconfig variable | David Hendricks |
2015-04-17 | pistachio: add DDR2 initialization code | Ionela Voinescu |
2015-04-17 | pistachio: report UART register width | Vadim Bendebury |
2015-04-17 | uart: pass register width in the coreboot table | Vadim Bendebury |
2015-04-14 | pistachio: implement clock setup for I2C0 | Ionela Voinescu |
2015-04-14 | pistachio: Fix ROM clock base address | Ionela Voinescu |
2015-04-14 | urara: add clock setup for MIPS CPU, ROM and Ethernet | Ionela Voinescu |
2015-04-14 | pistachio: fix clocks setup code | Ionela Voinescu |
2015-04-14 | pistachio: Use 1.8433179 MHz for UART refclk | David Hendricks |
2015-04-14 | pistachio: increase size of bootblock to 18 KB | Ionela Voinescu |
2015-04-14 | pistachio: change memory layout as to allow bigger CBFS cache | Ionela Voinescu |
2015-04-14 | pistachio: spi: use same clock edge for RX and TX | Ionela Voinescu |
2015-04-14 | urara: Configure clocks and MFIOs | Ionela Voinescu |
2015-04-14 | CBFS: Automate ROM image layout and remove hardcoded offsets | Julius Werner |
2015-04-13 | spi: support controllers with limited transfer size capabilities | Vadim Bendebury |
2015-04-13 | urara: add support for DMA coherent memory area | Ionela Voinescu |
2015-04-13 | pistachio: increase the size of romstage to 36K | Ionela Voinescu |
2015-04-09 | pistachio: add timer frequency for SOC; correct platform ID | Ionela Voinescu |
2015-04-09 | pistachio: add SOC descriptor | Vadim Bendebury |
2015-04-09 | pistachio: modify memory layout | Vadim Bendebury |
2015-04-09 | pistachio: set correct CBMEM top address | Vadim Bendebury |
2015-04-09 | pistachio: allow more room for bootblock | Vadim Bendebury |
2015-04-09 | pistachio: implement timer support | Vadim Bendebury |
2015-04-07 | pistachio: Change all SoC headers to <soc/headername.h> system | Julius Werner |
2015-04-07 | kconfig: drop intermittend forwarder files | Stefan Reinauer |
2015-04-06 | New mechanism to define SRAM/memory map with automatic bounds checking | Julius Werner |
2015-04-02 | pistachio: add gpio type definition | Vadim Bendebury |
2015-04-02 | urara: Fix CBFS header definitions | Vadim Bendebury |
2015-03-30 | imgtec/pistachio: Bring uart driver to modern standards | Patrick Georgi |
2015-03-28 | pistachio: don't open code ramstage loading | Aaron Durbin |
2015-03-27 | soc/imgtec/pistachio: Add IMGTEC SPI controller driver | Ionela Voinescu |
2015-03-27 | urara: use proper SOC name | Vadim Bendebury |
2015-03-23 | mips: fix bootblock stack definitions | Vadim Bendebury |
2015-03-23 | danube: Use the generic timer interface | Vadim Bendebury |
2015-03-23 | danube: use SOC specific rom stage code | Vadim Bendebury |
2015-03-21 | danube: prepare SOC directory for urara | Vadim Bendebury |
2015-03-21 | imgtec/danube: Add support for ImgTec Danube SoC | Paul Burton |