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path: root/src/soc/imgtec/pistachio
AgeCommit message (Expand)Author
2015-04-14pistachio: implement clock setup for I2C0Ionela Voinescu
2015-04-14pistachio: Fix ROM clock base addressIonela Voinescu
2015-04-14urara: add clock setup for MIPS CPU, ROM and EthernetIonela Voinescu
2015-04-14pistachio: fix clocks setup codeIonela Voinescu
2015-04-14pistachio: Use 1.8433179 MHz for UART refclkDavid Hendricks
2015-04-14pistachio: increase size of bootblock to 18 KBIonela Voinescu
2015-04-14pistachio: change memory layout as to allow bigger CBFS cacheIonela Voinescu
2015-04-14pistachio: spi: use same clock edge for RX and TXIonela Voinescu
2015-04-14urara: Configure clocks and MFIOsIonela Voinescu
2015-04-14CBFS: Automate ROM image layout and remove hardcoded offsetsJulius Werner
2015-04-13spi: support controllers with limited transfer size capabilitiesVadim Bendebury
2015-04-13urara: add support for DMA coherent memory areaIonela Voinescu
2015-04-13pistachio: increase the size of romstage to 36KIonela Voinescu
2015-04-09pistachio: add timer frequency for SOC; correct platform IDIonela Voinescu
2015-04-09pistachio: add SOC descriptorVadim Bendebury
2015-04-09pistachio: modify memory layoutVadim Bendebury
2015-04-09pistachio: set correct CBMEM top addressVadim Bendebury
2015-04-09pistachio: allow more room for bootblockVadim Bendebury
2015-04-09pistachio: implement timer supportVadim Bendebury
2015-04-07pistachio: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-04-06New mechanism to define SRAM/memory map with automatic bounds checkingJulius Werner
2015-04-02pistachio: add gpio type definitionVadim Bendebury
2015-04-02urara: Fix CBFS header definitionsVadim Bendebury
2015-03-30imgtec/pistachio: Bring uart driver to modern standardsPatrick Georgi
2015-03-28pistachio: don't open code ramstage loadingAaron Durbin
2015-03-27soc/imgtec/pistachio: Add IMGTEC SPI controller driverIonela Voinescu
2015-03-27urara: use proper SOC nameVadim Bendebury
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