Age | Commit message (Expand) | Author |
2020-09-22 | soc/cavium: Drop unneeded empty lines | Elyes HAOUAS |
2020-08-27 | symbols: Change implementation details of DECLARE_OPTIONAL_REGION() | Julius Werner |
2020-05-18 | src: Remove leading blank lines from SPDX header | Elyes HAOUAS |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-09 | src/: Replace GPL boilerplate with SPDX headers | Patrick Georgi |
2020-04-06 | soc/cavium: Use SPDX for GPL-2.0-only files | Angel Pons |
2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
2019-10-04 | devicetree: Fix improper use of chip_operations | Kyösti Mälkki |
2019-10-04 | soc/cavium/common/Makefile: Convert STACK_SIZE value to decimal | Elyes HAOUAS |
2019-07-04 | device/pci_ops: Define pci_find_capability() just once | Kyösti Mälkki |
2019-04-25 | soc/cavium/common/bootblock: Remove unused variables | Elyes HAOUAS |
2019-04-23 | src: include <assert.h> when appropriate | Elyes HAOUAS |
2019-04-06 | src: Use include <delay.h> when appropriate | Elyes HAOUAS |
2019-03-29 | src: Use include <reset.h> when appropriate | Elyes HAOUAS |
2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
2019-02-25 | soc/cavium/common: Make ecam0_get_bar_val common | Patrick Rudolph |
2019-02-22 | drivers/cavium: Add UART PCI driver | Patrick Rudolph |
2019-02-22 | symbols.h: Add macro to define memlayout region symbols | Julius Werner |
2019-01-09 | soc/cavium: Remove white spaces before tabs | Elyes HAOUAS |
2018-11-01 | src: Add missing include <stdint.h> | Elyes HAOUAS |
2018-08-10 | soc/cavium/cn81xx: Fix minor things | Patrick Rudolph |
2018-07-30 | soc/cavium/cn81xx: Use ATF from blobs repo | Patrick Rudolph |
2018-07-30 | soc/cavium/bootblock: Get rid of register X1 | Patrick Rudolph |
2018-07-19 | soc/cavium: Add PCI support | Patrick Rudolph |
2018-07-10 | soc/cavium: Add secondary CPU support | Patrick Rudolph |
2018-07-10 | cavium: Add CN81xx SoC and eval board support | David Hendricks |