| Age | Commit message (Expand) | Author |
|---|
| 2021-07-12 | soc/amd/*/mca: use mca_get_bank_count() | Felix Held |
| 2021-07-12 | soc/amd/{cezanne,common}: Enable IOMMU PCIe Device | Raul E Rangel |
| 2021-07-12 | soc/amd/cezanne/acpi: Change GPIO controller interrupt to shared | Raul E Rangel |
| 2021-07-12 | soc/amd/picasso,stoneyridge/mca: remove unneeded line break | Felix Held |
| 2021-07-06 | soc/amd/picasso: Allow end range entry for max device ID in IVRS | Aamir Bohra |
| 2021-07-02 | soc/amd/common/espi: Fix debug message log level | Raul E Rangel |
| 2021-07-02 | soc/amd/common/block/cpu: Cache the uCode to avoid multiple SPI reads | Raul E Rangel |
| 2021-07-02 | soc/amd/cezanne: Enable SPI DMA support | Raul E Rangel |
| 2021-07-02 | soc/amd/common/block/lpc: Add custom SPI DMA boot device | Raul E Rangel |
| 2021-07-02 | src: Introduce `ARCH_ALL_STAGES_X86` | Angel Pons |
| 2021-06-30 | src: Move `select ARCH_X86` to platforms | Angel Pons |
| 2021-06-30 | soc/amd/common/fsp/dmi.c: Fix Type 17 DMI reporting | Nikolai Vyssotski |
| 2021-06-28 | soc/amd/cezanne: Add call to mb to configure eSPI requirements | Martin Roth |
| 2021-06-23 | soc/amd/common/acp: Populate _WOV ACPI method | Karthikeyan Ramasubramanian |
| 2021-06-23 | soc/amd/cezanne: Init eSPI early if required | Martin Roth |
| 2021-06-23 | soc/amd/common/block/cpu/noncar/memmap: move BERT region back into CBMEM | Felix Held |
| 2021-06-22 | soc/amd/common: Add GPIO config for native func w/ output drive | Martin Roth |
| 2021-06-21 | soc/amd/cezanne/fsp_m_params: set HD Audio enable UPD from devicetree | Felix Held |
| 2021-06-21 | soc/amd/cezanne/fsp_m_params: set SATA enable UPD from devicetree info | Felix Held |
| 2021-06-18 | soc/amd/picasso,stoneyridge/acpi: use defines for MADT parameters | Felix Held |
| 2021-06-17 | soc/amd/stoneyridge: factor out AOAC offset defines | Felix Held |
| 2021-06-17 | soc/amd/picasso: introduce and use devicetree aliases for UART0-3 | Felix Held |
| 2021-06-16 | timestamp,amd/common/apob_cache: Add timestamps for APOB | Raul E Rangel |
| 2021-06-16 | soc/amd/picasso/Kconfig: fix CONSOLE_UART_BASE_ADDRESS for SoC UART2 | Felix Held |
| 2021-06-16 | soc/amd/picasso: introduce and use devicetree aliases for I2C2&I2C3 | Felix Held |
| 2021-06-16 | soc/amd/common/block/acpi/bert: fix NULL check | Felix Held |
| 2021-06-16 | soc/amd/cezanne/include/soc/iomap: add eMMC MMIO base addresses | Felix Held |
| 2021-06-16 | soc/amd/cezanne,picasso/include/soc/iomap: reflow I2C_DEVICE_COUNT | Felix Held |
| 2021-06-16 | soc/amd/cezanne/acpi/mmio: use AOAC offset defines | Felix Held |
| 2021-06-16 | soc/amd/cezanne: factor out AOAC offset defines | Felix Held |
| 2021-06-16 | soc/amd/picasso/acpi/sb_fch: use AOAC offset defines | Felix Held |
| 2021-06-16 | soc/amd/picasso: factor out AOAC offset defines | Felix Held |
| 2021-06-16 | soc/amd/cezanne,picasso: add AOAC offset define for the eMMC controller | Felix Held |
| 2021-06-14 | soc/amd/{cezanne,picasso}: Add TS_START_ROMSTAGE | Raul E Rangel |
| 2021-06-14 | soc/amd/common/pi/agesawrapper: use IOAPIC ID defines | Felix Held |
| 2021-06-13 | soc/amd/cezanne: Supply SMBIOS/DMI Type 17 data | Nikolai Vyssotski |
| 2021-06-13 | soc/amd/picasso: Move Type 17 DMI generation to common | Nikolai Vyssotski |
| 2021-06-13 | soc/amd/cezanne: call boot_with_psp_timestamp | Kangheui Won |
| 2021-06-11 | soc/amd/cezanne: remove warm reset flag code | Felix Held |
| 2021-06-11 | soc/amd/stoneyridge: Set missing RTC offsets for day alarm and century | Anand K Mistry |
| 2021-06-11 | cpu/x86/lapic: Replace LOCAL_APIC_ADDR references | Kyösti Mälkki |
| 2021-06-08 | soc/amd: factor out acpi_soc_get_bert_region to amd/common | Felix Held |
| 2021-06-08 | soc/amd/picasso/agesa_acpi: add BERT support | Felix Held |
| 2021-06-08 | soc/amd/stoneyridge: use common BERT ACPI table generation | Felix Held |
| 2021-06-08 | arch/x86/include/bert_storage: introduce bert_should_generate_acpi_table | Felix Held |
| 2021-06-07 | cpu/x86: Default to PARALLEL_MP selected | Kyösti Mälkki |
| 2021-06-07 | soc/amd/common/fsp/pci: Add size field to PCIe interrupt routing HOB | Nikolai Vyssotski |
| 2021-06-07 | soc/amd/cezanne: Configure I2C Pad RX Select through devicetree | Karthikeyan Ramasubramanian |
| 2021-06-07 | cezanne/psp_verstage: add reset/timer svc | Kangheui Won |
| 2021-06-07 | psp_verstage: initialize i2c in soc_init | Kangheui Won |
| 2021-06-02 | soc/amd/picasso: remove warm reset flag code | Felix Held |
| 2021-06-01 | soc/amd/cezanne/include/iomap: properly align defines | Felix Held |
| 2021-06-01 | soc/amd/picasso: introduce and use chipset device tree | Felix Held |
| 2021-05-31 | soc/amd/cezanne: Add pre-FSPM call to the mainboard | Martin Roth |
| 2021-05-30 | soc/amd/common/block/espi: Explicitly assert PLTRST# | Raul E Rangel |
| 2021-05-28 | soc/amd/picasso: fix MCACHE on psp_verstage RO boot | Kangheui Won |
| 2021-05-27 | soc/amd/common/block: Fix missing include in acp.h | Raul E Rangel |
| 2021-05-27 | soc/amd/picasso: add devicetree setting for PSPP policy | Felix Held |
| 2021-05-27 | soc/amd/cezanne: add devicetree setting for PSPP policy | Felix Held |
| 2021-05-26 | soc/amd/picasso/mca: use MCAX registers instead of legacy MCA | Felix Held |
| 2021-05-26 | soc/amd/cezanne: add support for the changed AMD FSP API for USB PHY | Julian Schroeder |
| 2021-05-26 | soc/amd/common/block/espi: Fix typo in espi_setup_periph_channel | Raul E Rangel |
| 2021-05-25 | soc/amd/common/block/espi: Increase ESPI_CH_READY_TIMEOUT_US to 10ms | Raul E Rangel |
| 2021-05-22 | soc/amd: reduce MCACHE size with psp_verstage | Kangheui Won |
| 2021-05-22 | soc/amd/cezanne,picasso/reset: use byte I/O read for NCP_ERR | Felix Held |
| 2021-05-21 | soc/amd/cezanne,common,picasso: use BERT region reserved by FSP driver | Felix Held |
| 2021-05-20 | soc/amd/common: Show espi init in log | Martin Roth |
| 2021-05-19 | soc/amd/common/block/espi_util: Work around in-band reset race condition | Raul E Rangel |
| 2021-05-19 | soc/amd/cezanne/fch: add PCIe GPP clock generator configuration settings | Felix Held |
| 2021-05-19 | soc/amd/picasso: move gpp_clk_req_setting definition to chip.h | Felix Held |
| 2021-05-18 | cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y | Arthur Heymans |
| 2021-05-16 | soc/amd/*/Makefile.inc: Strip the quotes | Zheng Bao |
| 2021-05-14 | soc/amd/cezanne: Enable GFX HDA FSP UPD | Karthikeyan Ramasubramanian |
| 2021-05-13 | soc/amd: factor out acpigen_write_alib_dptc to common code | Felix Held |
| 2021-05-13 | soc/amd/cezanne/root_complex: generate DPTC ACPI method | Felix Held |
| 2021-05-12 | soc/amd/cezanne/chip.h: add DPTC and tablet mode options | Felix Held |
| 2021-05-12 | psp_verstage: remove not-implemented files for cezanne | Kangheui Won |
| 2021-05-12 | soc/amd/{common,picasso}: Use common PCIE_GPP_DRIVER driver | Raul E Rangel |
| 2021-05-12 | soc/amd/common/block/pci: Capitalize PCI ACPI names | Raul E Rangel |
| 2021-05-12 | soc/amd{common,cezanne}: Move pcie_gpp.c to common | Raul E Rangel |
| 2021-05-11 | soc/amd/picasso: Disable CBFS MCACHE again | Raul E Rangel |
| 2021-05-10 | soc/amd/picasso: move acpigen_dptc_call_alib to new common alib | Felix Held |
| 2021-05-10 | Revert "soc/amd/common/espi: Don't set alert pin in espi_set_initial_config" | Raul E Rangel |
| 2021-05-10 | soc/amd/cezanne: Force resets to be cold | Marshall Dawson |
| 2021-05-10 | cezanne/psp_verstage: update SRAM address | Kangheui Won |
| 2021-05-10 | amd/cezanne: verify transfer buffer in bootblock | Kangheui Won |
| 2021-05-10 | psp_verstage: differentiate bios entry | Kangheui Won |
| 2021-05-10 | psp_verstage: move platform-specific code to chipset.c | Kangheui Won |
| 2021-05-10 | cezanne/psp_verstage: clean up duplicated target | Kangheui Won |
| 2021-05-10 | cezanne/psp_verstage: populate a/b firmware | Kangheui Won |
| 2021-05-09 | soc/amd/cezanne: Generate PCI GPP ACPI names | Raul E Rangel |
| 2021-05-09 | soc/amd/cezanne: Enable GNB IO-APIC _PRT | Raul E Rangel |
| 2021-05-09 | soc/amd/cezanne: add GNB IOAPIC support | Felix Held |
| 2021-05-09 | soc/amd/cezanne: Generate PCI routing table | Raul E Rangel |
| 2021-05-09 | soc/amd/cezanne: Populate PCI_INTR registers | Raul E Rangel |
| 2021-05-09 | soc/amd/common/fsp/pci: Add helper methods for PCI IRQ table | Raul E Rangel |
| 2021-05-09 | soc/amd/picasso/pci_gpp: Switch to using acpigen_write_pci_GNB_PRT | Raul E Rangel |
| 2021-05-09 | soc/amd/common/block/pci: Implement acpigen_write_pci_{GNB,FCH}_PRT | Raul E Rangel |
| 2021-05-09 | soc/amd/{picasso,common/blocks/pci}: Move populate_pirq_data | Raul E Rangel |
| 2021-05-09 | soc/amd/picasso: Migrate to struct pci_routing_info | Raul E Rangel |
