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The CAR APIs already exist to deal with proper type useage.
Don't open code things that already exist.
BUG=b:65485690
Change-Id: I09593401513f6060a30cf5c02c94d14afbe8f4fd
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/23412
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
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This corrects a bug in 918c8717 "amd/stoneyridge: Add SPI controller
driver". Pass a pointer to din to the do_command() function so the
caller's copy is correctly updated. The bug allowed reads <= 5 bytes
to work correctly (3 bytes consumed in the FIFO by the address) but
overwrote data in the din buffer on larger transfers.
Change-Id: I32b7752f047112849871cafc9ae33c5ea1466ee1
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22519
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Add more definitions for the controller registers and fields. Add
source that is adapted from hudson and updated for Stoney Ridge.
This was tested with follow-on patches that write S3 data to flash.
BUG=b:68992021
Change-Id: I61d64cfdb4fce11c068113680da7ba6a199d6893
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
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