| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-11-17 | amd/stoneyridge: Enable SMI trap on SlpTyp | Marshall Dawson |
| 2017-11-14 | amd/stoneyridge: Replace BIT(n) in southbridge | Marshall Dawson |
| 2017-11-10 | amd/stoneyridge: Use the new generic acpi_sleep_from_pm1 | Marshall Dawson |
| 2017-11-10 | soc/amd/stoneyridge: Simplify and fix SMBUS code | Richard Spiegel |
| 2017-10-02 | amd/stoneyridge: Change SMM setup functions | Marshall Dawson |
| 2017-10-02 | amd/stoneyridge: Move pm/smi_read/write functions to util file | Marshall Dawson |
| 2017-10-02 | amd/stoneyridge: Add pm_read32 and pm_write32 to southbridge | Marshall Dawson |
| 2017-10-02 | amd/stoneyridge: Fix pm_read16 argument size | Marshall Dawson |
| 2017-10-02 | soc/amd/stoneyridge/southbridge.c: Remove preprocessor #if | Richard Spiegel |
| 2017-09-30 | amd/stoneyridge: Use generic SMM command port values | Marshall Dawson |
| 2017-08-14 | stoneyridge: Rename hudson to southbridge | Marc Jones |
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index : coreboot.git | |
| my copy of coreboot | User & |
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