coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2017-11-04	soc/amd/stoneyridge: remove superfluous NULL field initialization	Aaron Durbin
	By definition in C, fields that are not explicitly initialized will be zero'd out. Therefore, remove the redundant struture field initialization. Change-Id: I1b3b2ddf6d2a763e65861a7bcebc6b7cd96691c2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/22314 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2017-10-12	soc/amd/stoneyridge: Clean up sata.c	Richard Spiegel
	Clean up ahci_ptr declaration. Remove incorrect PCI device IDs. BUG=b:62200375 Change-Id: I9058d9102fc8ea0bd03ea089ba98da4590dd3533 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/21973 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-09-15	soc/amd/stoneyridge: Improve code quality	Richard Spiegel
	Remove empty functions. In function pointer structure "device_operations", replace the 0 equality by NULL equality. Files: hda.c, sata.c and usb.c Change-Id: I9f8dc7681ab2e651872e69a8b2e990e59ebe80c9 Signed-off-by: Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/21522 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-08-14	stoneyridge: Rename hudson to southbridge	Marc Jones
	Simplify funciton names and remove reference to hudson in stoneyridge. The southbridge in Stoney Ridge is Kern and hudson naming is no longer accurate. BUG=b:62200157 BRANCH=none TEST=Build and booted on Kahlee. Change-Id: Ide7a72dae69b881997101f1e37a1ac739901744d Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/20912 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-06-27	soc/amd/stoneyridge: Fix most checkpatch errors	Marshall Dawson
	Correct the majority of reported errors and mark most of the remaining ones as todo. (Some of the lines requiring a >80 break are indented too much currently.) Some of the alignment in hudson.h still causes checkpatch errors, but this is intentionally left as-is. Also make other misc. changes, e.g. consistency in lower-case for hex values, using defined values, etc. These changes were confirmed to cause no changes in a Gardenia build. No other improvements were made, e.g. changing to helper functions, or converting functions like __outbyte(). BUG=chrome-os-partner:622407746 Change-Id: I768884a4c4b9505e77f5d6bfde37797520878912 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/19986 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-26	soc: Add AMD Stoney Ridge southbridge code	Marc Jones
	Copy the Hudson/Kern code from southbridge/amd/pi/hudson. This is the first of a series of patches to migrate Stoney Ridge support from cpu, northbridge, and southbridge to soc/ Changes: - add soc/amd/stoneyridge and soc/amd/common - remove all other Husdon versions - update include paths, etc - clean up Kconfig and Makefile - create chip.c to contain chip_ops Change-Id: Ib88a868e654ad127be70ecc506f6b90b784f8d1b Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/19722 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>