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romstage.c
Age
Commit message (
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Author
2018-04-24
compiler.h: add __weak macro
Aaron Durbin
2018-04-13
soc/amd/stoneyridge: add a romstage hook for mainboards
Martin Roth
2018-04-10
soc/amd/stoneyridege: Create AP jump structure
Richard Spiegel
2018-02-12
amd/stoneyridge: Add S3 support to POST
Marshall Dawson
2017-12-15
soc/amd/common: Update agesawrapper_call.h
Richard Spiegel
2017-12-12
soc/amd/common: Move Agesa related headers
Richard Spiegel
2017-11-13
soc/amd/stoneyridge: Fix DRAM clear check
Marshall Dawson
2017-11-10
soc/amd/stoneyridge: Add UMA settings to devicetree
Aaron Durbin
2017-11-10
soc/amd/common: Add DRAM clear option to northbridge.c
Richard Spiegel
2017-10-02
amd/stoneyridge: Remove 16MB cbmem assert
Marshall Dawson
2017-09-27
soc/amd/stoneyridge: Add postcar stage
Marshall Dawson
2017-09-27
amd/stoneyridge: Move AmdInitEnv to ramstage
Marshall Dawson
2017-09-27
amd/stoneyridge: Convert MP init to mp_init_with_smm
Marshall Dawson
2017-08-14
stoneyridge: Rename hudson to southbridge
Marc Jones
2017-07-27
soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK
Marshall Dawson