coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-02-06	soc/amd/stoneyridge: Create chipset_power_state in romstage	Kyösti Mälkki
2021-01-26	soc/amd: Refactor some ACPI S3 calls	Kyösti Mälkki
2021-01-18	soc/amd/stoneyridge/romstage.c: Remove repeated word	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-04-05	soc/amd: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-02	soc/amd/common/psp: Move early init to soc	Felix Held
2020-04-02	soc/amd/common/psp: Consolidate FW blob load functions	Marshall Dawson
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-12-04	amdblocks/acpimmio: add common functions for AP entry	Michał Żygowski
2019-09-13	drivers/elog: Add elog_boot_notify()	Kyösti Mälkki
2019-09-12	soc/{amd, intel}: Make use of common postcar_enable_tseg_cache() API	Subrata Banik
2019-08-22	arch/x86: Add <arch/romstage.h>	Kyösti Mälkki
2019-08-21	arch/x86: Rename some mainboard_romstage_entry()	Kyösti Mälkki
2019-08-15	cpu/x86/smm: Promote smm_memory_map()	Kyösti Mälkki
2019-08-08	arch/x86: Change smm_subregion() prototype	Kyösti Mälkki
2019-08-07	soc/amd: Rename smm_region_info() to smm_region()	Kyösti Mälkki
2019-08-07	cpu/x86/smm: Promote smm_subregion()	Kyösti Mälkki
2019-07-04	arch/x86: Adjust size of postcar stack	Kyösti Mälkki
2019-04-26	soc/{amd,intel}/chip: Use local include for chip.h	Elyes HAOUAS
2019-04-23	soc/amd/common: Introduce agesa_execute_state()	Kyösti Mälkki
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2019-01-06	device: Use pcidev_path_on_root()	Kyösti Mälkki
2018-12-05	soc/amd/stoneyridge: Run romstage mainboard code before AGESA	Martin Roth
2018-10-11	amd/stoneyridge: Indicate STAPM units in their name	Richard Spiegel
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-09-24	soc/amd/stoneyridge/romstage.c: Move STAPM code to SOC specific	Richard Spiegel
2018-09-20	soc/amd/stoneyridge/romstage.c: Remove obsolete comment	Richard Spiegel
2018-06-12	stoneyridge: Move agesa out of bootblock	Raul E Rangel
2018-06-04	soc/{amd,intel}: Use postcar_frame_add_romcache()	Nico Huber
2018-05-31	soc/{amd,intel}: Use CACHE_ROM_(BASE\|SIZE)	Nico Huber
2018-05-25	soc/amd/stoneyridge: Increment boot_count on non-S3 boots	Daniel Kurtz
2018-04-24	compiler.h: add __weak macro	Aaron Durbin
2018-04-13	soc/amd/stoneyridge: add a romstage hook for mainboards	Martin Roth
2018-04-10	soc/amd/stoneyridege: Create AP jump structure	Richard Spiegel
2018-02-12	amd/stoneyridge: Add S3 support to POST	Marshall Dawson
2017-12-15	soc/amd/common: Update agesawrapper_call.h	Richard Spiegel
2017-12-12	soc/amd/common: Move Agesa related headers	Richard Spiegel
2017-11-13	soc/amd/stoneyridge: Fix DRAM clear check	Marshall Dawson
2017-11-10	soc/amd/stoneyridge: Add UMA settings to devicetree	Aaron Durbin
2017-11-10	soc/amd/common: Add DRAM clear option to northbridge.c	Richard Spiegel
2017-10-02	amd/stoneyridge: Remove 16MB cbmem assert	Marshall Dawson
2017-09-27	soc/amd/stoneyridge: Add postcar stage	Marshall Dawson
2017-09-27	amd/stoneyridge: Move AmdInitEnv to ramstage	Marshall Dawson
2017-09-27	amd/stoneyridge: Convert MP init to mp_init_with_smm	Marshall Dawson
2017-08-14	stoneyridge: Rename hudson to southbridge	Marc Jones
2017-07-27	soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK	Marshall Dawson