| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-12-10 | soc/amd/stoneyridge/reset: use port and bit defines from cf9_reset.h | Felix Held |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-04-05 | soc/amd: Use SPDX for GPL-2.0-only files | Angel Pons |
| 2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
| 2019-05-16 | soc/amd/common: Create AcpiMmio functionality from stoneyridge | Marshall Dawson |
| 2018-10-22 | soc/amd: Implement common reset API | Nico Huber |
| 2018-08-08 | amd/stoneyridge: Add warm reset detection | Marshall Dawson |
| 2018-04-20 | pci: Move inline PCI functions to pci_ops.h | Patrick Rudolph |
| 2017-12-01 | soc/amd/stoney: clean up and update reset.c | Martin Roth |
| 2017-08-14 | stoneyridge: Rename hudson to southbridge | Marc Jones |
| 2017-06-27 | soc/amd/stoneyridge: Fix most checkpatch errors | Marshall Dawson |
| 2017-06-26 | soc: Add AMD Stoney Ridge southbridge code | Marc Jones |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |