coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2018-12-05	src/(device/lib/soc): Remove unused variables	Richard Spiegel
2018-10-30	soc/amd/stoneyridge: Remove dev_find_slot where possible	Richard Spiegel
2018-08-01	soc/amd/stoneyridge/lpc.c: Fix LPC host control naming	Richard Spiegel
2018-05-23	soc/amd/stoneyridge/: Get rid of device_t	Elyes HAOUAS
2018-04-16	soc/amd/stoneyridge/lpc.c: Fix bit definitions	Richard Spiegel
2018-01-03	soc/amd/stoneyridge: Add I2C support	Chris Ching
2017-12-07	amd/stoneyridge/lpc.c: Use new wide IO functions	Richard Spiegel
2017-11-09	soc/amd/stoneyridge: Fix and clean lpc.c	Richard Spiegel
2017-10-19	soc/amd/stoneyridge: Use macros for PCI_DEVFN calls	Chris Ching
2017-10-19	soc/amd/stoneyridge: Replace magic registers	Richard Spiegel
2017-10-15	soc/amd/stoneyridge/lpc.c: Refactor lpc_enable_childrens_resources	Richard Spiegel
2017-09-20	vboot: remove init_vbnv_cmos()	Aaron Durbin
2017-08-14	stoneyridge: Rename hudson to southbridge	Marc Jones
2017-07-31	soc/amd/stoneyridge: Add GNVS	Marc Jones
2017-06-27	soc/amd/stoneyridge: Fix most checkpatch errors	Marshall Dawson
2017-06-26	soc: Add AMD Stoney Ridge southbridge code	Marc Jones