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Instead of having each potential caller deal with the differences
of cmos_init() and init_vbnv_cmos() when VBOOT is enabled put the
correct logic within the callee, cmos_init(), for handling the
vbnv in CMOS. The internal __cmos_init() routine returns when the
CMOS area was cleared.
BUG=b:63054105
Change-Id: Ia124bcd61d3ac03e899a4ecf3645fc4b7a558f03
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21549
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Simplify funciton names and remove reference to hudson in stoneyridge.
The southbridge in Stoney Ridge is Kern and hudson naming is
no longer accurate.
BUG=b:62200157
BRANCH=none
TEST=Build and booted on Kahlee.
Change-Id: Ide7a72dae69b881997101f1e37a1ac739901744d
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/20912
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add ACPI asl for global non-volatile storage (GNVS).
Change-Id: I9ecab92181bfe60e7b6c6e91ffb9fa843345352f
Signed-off-by: Marc Jones <marc.jones@scarletltd.com>
Reviewed-on: https://review.coreboot.org/20275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Correct the majority of reported errors and mark most of the
remaining ones as todo. (Some of the lines requiring a >80
break are indented too much currently.) Some of the alignment
in hudson.h still causes checkpatch errors, but this is
intentionally left as-is.
Also make other misc. changes, e.g. consistency in lower-case
for hex values, using defined values, etc.
These changes were confirmed to cause no changes in a Gardenia
build. No other improvements were made, e.g. changing to helper
functions, or converting functions like __outbyte().
BUG=chrome-os-partner:622407746
Change-Id: I768884a4c4b9505e77f5d6bfde37797520878912
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/19986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
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Copy the Hudson/Kern code from southbridge/amd/pi/hudson. This
is the first of a series of patches to migrate Stoney Ridge
support from cpu, northbridge, and southbridge to soc/
Changes:
- add soc/amd/stoneyridge and soc/amd/common
- remove all other Husdon versions
- update include paths, etc
- clean up Kconfig and Makefile
- create chip.c to contain chip_ops
Change-Id: Ib88a868e654ad127be70ecc506f6b90b784f8d1b
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19722
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
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