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Remove the unused support code from the old multi-device hudson
SD controller. The binaryPI blob contains the correct steps
for setting up SD and the public BKDG doesn't completely document
the controller.
The sd.c file was using device IDs not associated with the Stoney
Ridge APU. The hudson_enable() code removed was also looking for
incorrect device IDs and the PM_MANUAL_RESET register doesn't
behave as the source indicates.
The SD default settings may be overridden. Future improvements
may include a few Kconfig options and a weak call to the mainboard
for overriding additional defaults.
BUG=chrome-os-partner:62580062
Change-Id: I7dbd70320740e8a05e6bf16af125d67012f20674
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/20401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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The Stoney Ridge does not contain this bridge like some of the older
Hudson FCHs. Remove this support from the source.
This moves the Stoney Ridge IRQ setup to the southbridge file, hudson.c.
BUG=chrome-os-partner:62580062
Change-Id: I8f974ba76b8c20f4335dd8872eaf4b8172188ee2
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/20198
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
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Correct the majority of reported errors and mark most of the
remaining ones as todo. (Some of the lines requiring a >80
break are indented too much currently.) Some of the alignment
in hudson.h still causes checkpatch errors, but this is
intentionally left as-is.
Also make other misc. changes, e.g. consistency in lower-case
for hex values, using defined values, etc.
These changes were confirmed to cause no changes in a Gardenia
build. No other improvements were made, e.g. changing to helper
functions, or converting functions like __outbyte().
BUG=chrome-os-partner:622407746
Change-Id: I768884a4c4b9505e77f5d6bfde37797520878912
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/19986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
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Copy the Hudson/Kern code from southbridge/amd/pi/hudson. This
is the first of a series of patches to migrate Stoney Ridge
support from cpu, northbridge, and southbridge to soc/
Changes:
- add soc/amd/stoneyridge and soc/amd/common
- remove all other Husdon versions
- update include paths, etc
- clean up Kconfig and Makefile
- create chip.c to contain chip_ops
Change-Id: Ib88a868e654ad127be70ecc506f6b90b784f8d1b
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19722
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
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