coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-12-19	soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>	Elyes HAOUAS
2019-04-23	src: Add missing include 'console.h'	Elyes HAOUAS
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-01-06	device: Use pcidev_path_on_root()	Kyösti Mälkki
2018-11-16	soc/amd: Convert from AMD units to coreboot units	Richard Spiegel
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-09-28	soc/amd/stoneyridge/BiosCallOuts: Remove #include <AmdLib.h>	Richard Spiegel
2018-08-06	soc/amd/stoneyridge: Disable SATA based on devicetree setting	Richard Spiegel
2018-07-31	src/soc/amd/stoneyridge: Remove IMC support	Richard Spiegel
2018-05-04	soc/amd/stoneyridge: Remove USB30PortInit setting	Martin Roth
2018-04-24	compiler.h: add __weak macro	Aaron Durbin
2018-03-16	soc/amd/stoneyridge: Create a HALT_THIS_AP callout	Richard Spiegel
2018-01-23	google/kahlee/BiosCallOuts.c: Remove platform_FchParams_reset	Richard Spiegel
2018-01-22	AMD/stoneyridge: Fix SATA reset inconsistency	Richard Spiegel
2017-12-12	soc/amd/common: Move Agesa related headers	Richard Spiegel
2017-11-29	soc/amd/stoneyridge: Add mainboard call for SPD values	Marc Jones
2017-11-20	amd/stoneyridge: Fix SPD files and functions camel case	Marc Jones
2017-11-14	soc/amd/stoneyridge: Remove direct AGESA header includes	Martin Roth
2017-10-20	Stoney Ridge Platforms: Make AGESA callout tables common	Martin Roth