coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-03-29	soc/amd/mendocino: Add FSP parameter for eDP power sequence adjustment	Chris.Wang
2023-03-27	soc/amd/mendocino: Add UPD to support USB3 force to gen1 by port	Patrick Huang
2023-03-04	soc/amd/mendocino: Add STT support for dptc tablet mode	Chris Wang
2023-03-04	soc/amd/mendocino: Remove the SPL DPTC parameter	Chris Wang
2023-01-20	soc/amd/mendocino: Remove TODO after review	Fred Reitberger
2023-01-04	soc/amd/mendocino: Hook up UPD dxio_tx_vboost_enable for PCIe optimization	Chris.Wang
2022-12-20	soc/amd/mendocino: add dptc tablet mode support	Chris.Wang
2022-10-28	soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles	EricKY Cheng
2022-10-26	soc/amd/mendocino: Enable GPP clk req disabling for disabled devices	Robert Zieba
2022-09-19	soc/amd/mendocino: Add low/no battery VRM limit registers	Tim Van Patten
2022-09-19	soc/amd/mendocino: Add VRM limit DPTC registers	Tim Van Patten
2022-09-15	amd/mendocino: Control DPTC with only Kconfig	Tim Van Patten
2022-09-12	soc/amd: Remove unsupported DPTC tablet mode settings	Tim Van Patten
2022-09-12	soc/amd: Refactor DPTC Tablet Mode	Tim Van Patten
2022-09-07	amd: Convert dptc_enable to bool	Tim Van Patten
2022-08-18	soc/amd/mendocino: enable CPPC feature	Felix Held
2022-08-11	treewide: Rename Sabrina to Mendocino	Jon Murphy