coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2022-11-11	soc/amd/root_complex: don't skip reporting IOAPIC resource in !hob case	Felix Held
	When no HOB list is found, not only adding the resources reported by the FSP were skipped, but also adding the GNB IOAPIC resource was skipped. Fix this bug by moving the reporting of the GNB IOAPIC resource before the resources reported in the FSP HOBs to not skip the IOAPIC resource when there's no HOB list. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I9174c8d7e5e94144187d27210e12f2dca3a6010f Reviewed-on: https://review.coreboot.org/c/coreboot/+/69460 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-10	/: Remove "ERROR: "/"WARNING: " prefixes from log messages	Elyes Haouas
	It is no longer necessary to explicitly add "ERROR: "/"WARNING: " in front of every BIOS_ERR/BIOS_WARN message. Change-Id: I22ee6ae15c3d3a848853c5460b3b3c1795adf2f5 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69405 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-11-04	soc/amd/*/data_fabric: Use common device ops	Fred Reitberger
	Use the common device ops instead of an soc-specific device ops. TEST=builds for each soc Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I1804200c3c3f5ab492d237f4b03484c383862caf Reviewed-on: https://review.coreboot.org/c/coreboot/+/69174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-11-04	soc/amd/*/data_fabric: Move register offsets to soc	Fred Reitberger
	Morgana/Glinda have a different register mapping for data fabric access, although the registers themselves are mostly compatible. The register layouts defined by each soc capture the differences and the common code can use those. Move the register offsets to soc headers and update the offsets for morgana/glinda per morgana ppr #57396, rev 1.52 and glinda ppr #57254, rev 1.51 Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I9e5e7c85f99a9afa873764ade9734831fb5cfe69 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69074 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-11-04	soc/amd: Specify memory types supported by each chip	Martin Roth
	This change disables support for memory types not used by each of the chips. This will in turn remove the files for those memory types from the platform builds. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I8c7f47b43d8d4a89630fbd645a725e61d74bc2a5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68994 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-11-03	soc/amd/glinda/data_fabric: Add register bitslice struct	Fred Reitberger
	Add structs to define the data_fabric register bitfields, updated per glinda ppr #57254, rev 1.51 Update IOMS0_FABRIC_ID and DF_MMIO_NP per referenced ppr. Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I509eaf5910d8d65ce0956200d7c00451ff9ce864 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69072 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-11-03	soc/amd/*/data_fabric: move data_fabric_set_mmio_np to common	Fred Reitberger
	The data_fabric_set_mmio_np function is effectively identical, so move it to common code. Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I58e524a34a20e1c6f088feaf39d592b8d5efab58 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-11-03	soc/amd: Include <cpu/cpu.h> instead of <arch/cpu.h>	Elyes Haouas
	Also sort includes. Change-Id: Iea29938623fe1b2bcdd7f869b0accbc1f8758e7a Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69033 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-10-29	soc/amd/*/acpi/mmio.asl,sb_fch.asl: hide AAHB device	Felix Held
	Don't set bit 2 in _STA in order for Windows not to show a warning about an unknown device in the device manager for this device. Since the _STA object just returns a constant, a name definition can be used instead of a method definition. TEST=The unknown device with device instance path ACPI\AAHB0000\0 disappeared from the device manager in Windows 10 build 19045 on a Mandolin board with a Picasso APU. Just shutting down and then booting it again won't clear some internal state in Windows, so a reboot is needed instead for the change to become visible. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8cb1712756c3623cc3ea16210af69cde0fa18f62 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68961 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2022-10-29	soc/amd/glinda: Don't add amdfw.rom to cbfs in SOC Makefile	Martin Roth
	CB:66943 - commit 8d66fb1a705 (soc/amd: Add amdfw.rom in coreboot.pre) changed the build flow for the amd firmware binary after glinda was branched from morgana. Update glinda to match the other SoCs. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I5b0ccaa8c33e59f7146edd6a86f107480c152008 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68931 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2022-10-25	soc/amd: Add framework for Glinda SoC	Martin Roth
	This adds the initial framework for the Glinda SoC, based on what's been done for Morgana already. I believe that there's more that can be made common, but that work will continue as both platforms are developed. Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: I43d0fdb711c441dc410a14f6bb04b808abefe920 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68684 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>