| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-12-11 | vc/amd/pi/00670F00/binaryPI: cache the AGESA dispatcher | Aaron Durbin |
| 2017-11-14 | AMD Stoney Ridge: Add agesa_headers.h | Martin Roth |
| 2017-11-10 | soc/amd/common: Add DRAM clear option to northbridge.c | Richard Spiegel |
| 2017-11-08 | amd/stoneyridge: Remove fixme.c | Marshall Dawson |
| 2017-08-28 | soc/amd: Standardize guards on header files | Martin Roth |
| 2017-07-11 | binaryPI: Define AGESA blob in CBFS as Kconfig string | Kyösti Mälkki |
| 2017-06-27 | soc/amd/common: Fix most checkpatch errors | Marshall Dawson |
| 2017-06-27 | vendorcode/amd: Unify Porting.h across all targets | Stefan Reinauer |
| 2017-06-26 | soc/amd/stoneyridge: Add northbridge support | Marc Jones |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |