coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2024-02-29	soc/amd: move common pci_domain_fill_ssdt implementation to acpi/	Felix Held
2024-02-07	soc/amd: drop unneeded data_fabric_set_mmio_np	Felix Held
2024-02-02	soc/amd: commonize PCI root IOAPIC initialization	Felix Held
2024-01-31	include/device/device.h: Remove CHIP_NAME() macro	Nicholas Sudsgaard
2024-01-27	soc/amd/*/acpi: use common soc_acpi_write_tables prototype	Felix Held
2024-01-27	soc/amd: rename agesa_write_acpi_tables to soc_acpi_write_tables	Felix Held
2024-01-20	soc/amd/*/chip: factor out FSP-S call	Felix Held
2023-06-07	soc/amd/cezanne/chip: use common data fabric domain resource code	Felix Held
2023-01-17	soc/amd: introduce and use common amd_cpu_bus_ops struct	Felix Held
2022-11-03	soc/amd/*/data_fabric: move data_fabric_set_mmio_np to common	Fred Reitberger
2022-10-13	soc/amd/*: Hook up device_operations in chipset.cb	Arthur Heymans
2022-10-13	soc/amd/*: Move emmc disabling to device ops	Arthur Heymans
2021-08-29	soc/amd/cezanne/chip: add functionality to power down eMMC interface	Felix Held
2021-05-05	soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables	Felix Held
2021-04-16	soc/amd/cezanne: Port ACPI p-state and c-state entries from picasso	Jason Glenesk
2021-04-01	soc/amd/cezanne: Add device tree support for I2C	Raul E Rangel
2021-02-18	soc/amd/cezanne/chip: add soc_acpi_name	Felix Held
2021-02-14	soc/amd/cezanne: add partial data fabric setup	Felix Held
2021-02-11	soc/amd/cezanne/chip: set device operations for UART MMIO devices	Felix Held
2021-02-11	soc/amd/cezanne: add empty mp_init_cpus	Felix Held
2021-02-10	soc/amd/cezanne/chip: add empty set_mmio_dev_ops	Felix Held
2021-02-10	soc/amd/cezanne/chip: add empty cpu_bus_ops	Felix Held
2021-02-09	soc/amd,intel: Drop s3_resume parameter on FSP-S functions	Kyösti Mälkki
2021-02-07	soc/amd/cezanne/chip: add PCI bus scanning	Felix Held
2021-01-30	soc/amd/cezanne: add use result of acpi_is_wakeup_s3() in FSP calls	Felix Held
2021-01-29	soc/amd/cezanne: add empty ramstage FCH support	Felix Held
2021-01-29	soc/amd/cezanne/chip: add FSP silicon init driver call	Felix Held
2021-01-28	soc/amd/cezanne/chip: add empty SoC device operations	Felix Held
2020-12-06	soc/amd/cezanne: add config.c and minimal chip.h	Felix Held
2020-12-05	soc/amd/cezanne: add skeleton for new SoC	Felix Held