| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-01-20 | soc/amd/cezanne/Kconfig: select IDT_IN_EVERY_STAGE | Felix Held |
| 2021-01-18 | ACPI: Select ACPI_SOC_NVS only where suitable | Kyösti Mälkki |
| 2021-01-14 | soc/amd/cezanne: add AOAC support | Felix Held |
| 2021-01-14 | soc/amd/cezanne: add console UART support | Felix Held |
| 2021-01-11 | soc/amd/cezzane: Add a minimal chipset tree | Furquan Shaikh |
| 2021-01-10 | ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations | Kyösti Mälkki |
| 2020-12-18 | soc/amd/cezanne: add GPIO support | Felix Held |
| 2020-12-18 | soc/amd/cezanne: Add SMI support | Zheng Bao |
| 2020-12-11 | soc/amd/cezanne: add 0xcf9 reset | Felix Held |
| 2020-12-09 | soc/amd/cezanne: add common SMBus code to build | Felix Held |
| 2020-12-09 | soc/amd: Remove Kconfig BOOTBLOCK_ADDR | Kyösti Mälkki |
| 2020-12-09 | soc/amd: Remove Kconfig X86_RESET_VECTOR | Kyösti Mälkki |
| 2020-12-09 | soc/amd/cezanne: select common ACPIMMIO block | Felix Held |
| 2020-12-06 | soc/amd/cezanne: use common TSC and monotonic timer code | Felix Held |
| 2020-12-05 | soc/amd/cezanne: add skeleton for new SoC | Felix Held |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |