summaryrefslogtreecommitdiff
path: root/src/security/intel
AgeCommit message (Expand)Author
2020-12-29sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurableArthur Heymans
2020-12-02cbfs: Simplify load/map API names, remove type argumentsJulius Werner
2020-11-10sec/intel/cbnt: Stitch in ACMs in the coreboot imageArthur Heymans
2020-11-04haswell: Add Intel TXT support in romstageAngel Pons
2020-11-04sec/intel/txt: Add support for running SCLEAN in romstageAngel Pons
2020-10-28sec/intel/txt/Kconfig: Remove the menu for including ACMsArthur Heymans
2020-10-28sec/intel/txt/Makefile.inc: Include ACMs using Kconfig variablesArthur Heymans
2020-10-22sec/intel/txt: Split MTRR setup ASM code into a macroAngel Pons
2020-10-22sec/intel/txt: Add `enable_getsec_or_reset` functionAngel Pons
2020-10-22sec/intel/txt: Extract BIOS ACM loading into a functionAngel Pons
2020-10-22sec/intel/txt: Only run LockConfig for LT-SXAngel Pons
2020-10-22sec/intel/txt: Always run SCHECK on regular bootsAngel Pons
2020-10-22sec/intel/txt: Allow skipping ACM NOP functionAngel Pons
2020-10-22sec/intel/txt/ramstage.c: Do not init the heap on S3 resumeAngel Pons
2020-10-22sec/intel/txt/ramstage.c: Extract heap init into a functionAngel Pons
2020-10-22sec/intel/txt: Add and fill in BIOS Specification infoAngel Pons
2020-10-22sec/intel/txt/common.c: Only log ACM error on failureAngel Pons
2020-10-22sec/intel/txt: Move DPR size to KconfigAngel Pons
2020-10-17intel/txt: Add `txt_get_chipset_dpr` functionAngel Pons
2020-10-17security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]Angel Pons
2020-10-17sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACMAngel Pons
2020-10-15sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPEArthur Heymans
2020-10-15security/intel/txt: Use `smm_region()` to get TSEG baseAngel Pons
2020-10-12security/intel/txt: Add and use DPR register layoutAngel Pons
2020-10-12security/intel/txt: Clean up includesAngel Pons
2020-10-12security/intel/stm: Add options for STM buildEugene Myers
2020-10-08security/intel/txt: Print chipset as hex valueChristian Walter
2020-10-01security/intel/stm: Fix size_t printf format errorFelix Held
2020-09-30security/intel/stm: Fix size_t printf format errorEugene D Myers
2020-09-21src/security: Drop unneeded empty linesElyes HAOUAS
2020-08-30security/intel/txt/getsec.c: Do not check lock bitAngel Pons
2020-08-30security/intel/txt: Add missing definitionsAngel Pons
2020-08-18src: Remove unused 'include <lib.h>'Elyes HAOUAS
2020-08-07security/intel/txt: Fix variable MTRR handlingAngel Pons
2020-08-07security/intel/txt: Allow using CF9 reset, tooAngel Pons
2020-08-06security/intel/txt: Avoid shifting by a negative valueJohn Zhao
2020-07-31security/intel/txt: Add Intel TXT supportPhilipp Deppenwiese
2020-07-21security/intel/stm: Add missing <stdbool.h>Angel Pons
2020-07-14src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS
2020-05-18src: Remove unused 'include <lib.h>'Elyes HAOUAS
2020-05-13src: Remove unused '#include <stddef.h>'Elyes HAOUAS
2020-05-11treewide: Convert more license headers to SPDX stylePatrick Georgi
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-08{security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-02intel/stm: Drop now unneeded `num_cpus` paramEugene D Myers
2020-05-02intel/stm: Place resource list right below MSEGEugene D Myers
2020-04-15Do not select USE_BLOBSNico Huber
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-02-21security/intel/stm: Use depends on ENABLE_VMXEugene Myers
2020-02-21security/intel/stm: Check for processor STM supportEugene Myers
2020-02-09intel/stm: Add platform opt-in KconfigNico Huber
2020-02-05security/intel/stm: Add STM supportEugene Myers
2019-11-21soc/intel/fsp_broadwell_de: Drop supportArthur Heymans
2019-11-14security/intel: Hide Intel submenu when INTEL TXT is disabledWim Vervoorn
2019-10-18build: Mark bootblock files on x86 as IBBPatrick Rudolph
2019-09-02security/intel: Add TXT infrastructurePatrick Rudolph