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Age
Commit message (
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Author
2021-01-04
security/intel/txt/ramstage.c: Fix clearing secrets on CBNT
Arthur Heymans
2020-12-29
sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurable
Arthur Heymans
2020-12-02
cbfs: Simplify load/map API names, remove type arguments
Julius Werner
2020-11-10
sec/intel/cbnt: Stitch in ACMs in the coreboot image
Arthur Heymans
2020-11-04
haswell: Add Intel TXT support in romstage
Angel Pons
2020-11-04
sec/intel/txt: Add support for running SCLEAN in romstage
Angel Pons
2020-10-28
sec/intel/txt/Kconfig: Remove the menu for including ACMs
Arthur Heymans
2020-10-28
sec/intel/txt/Makefile.inc: Include ACMs using Kconfig variables
Arthur Heymans
2020-10-22
sec/intel/txt: Split MTRR setup ASM code into a macro
Angel Pons
2020-10-22
sec/intel/txt: Add `enable_getsec_or_reset` function
Angel Pons
2020-10-22
sec/intel/txt: Extract BIOS ACM loading into a function
Angel Pons
2020-10-22
sec/intel/txt: Only run LockConfig for LT-SX
Angel Pons
2020-10-22
sec/intel/txt: Always run SCHECK on regular boots
Angel Pons
2020-10-22
sec/intel/txt: Allow skipping ACM NOP function
Angel Pons
2020-10-22
sec/intel/txt/ramstage.c: Do not init the heap on S3 resume
Angel Pons
2020-10-22
sec/intel/txt/ramstage.c: Extract heap init into a function
Angel Pons
2020-10-22
sec/intel/txt: Add and fill in BIOS Specification info
Angel Pons
2020-10-22
sec/intel/txt/common.c: Only log ACM error on failure
Angel Pons
2020-10-22
sec/intel/txt: Move DPR size to Kconfig
Angel Pons
2020-10-17
intel/txt: Add `txt_get_chipset_dpr` function
Angel Pons
2020-10-17
security/intel/txt: Improve MTRR setup for GETSEC[ENTERACCS]
Angel Pons
2020-10-17
sec/intel/txt: Bail if var MTRRs cannot snugly cache the BIOS ACM
Angel Pons
2020-10-15
sec/intel/txt/getsec_enteraccs.S: Save and restore MTRR_DEF_TYPE
Arthur Heymans
2020-10-15
security/intel/txt: Use `smm_region()` to get TSEG base
Angel Pons
2020-10-12
security/intel/txt: Add and use DPR register layout
Angel Pons
2020-10-12
security/intel/txt: Clean up includes
Angel Pons
2020-10-08
security/intel/txt: Print chipset as hex value
Christian Walter
2020-09-21
src/security: Drop unneeded empty lines
Elyes HAOUAS
2020-08-30
security/intel/txt/getsec.c: Do not check lock bit
Angel Pons
2020-08-30
security/intel/txt: Add missing definitions
Angel Pons
2020-08-18
src: Remove unused 'include <lib.h>'
Elyes HAOUAS
2020-08-07
security/intel/txt: Fix variable MTRR handling
Angel Pons
2020-08-07
security/intel/txt: Allow using CF9 reset, too
Angel Pons
2020-08-06
security/intel/txt: Avoid shifting by a negative value
John Zhao
2020-07-31
security/intel/txt: Add Intel TXT support
Philipp Deppenwiese
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-08
{security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX header
Elyes HAOUAS
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2019-11-21
soc/intel/fsp_broadwell_de: Drop support
Arthur Heymans
2019-11-14
security/intel: Hide Intel submenu when INTEL TXT is disabled
Wim Vervoorn
2019-10-18
build: Mark bootblock files on x86 as IBB
Patrick Rudolph
2019-09-02
security/intel: Add TXT infrastructure
Patrick Rudolph