coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2004-10-30	- To reduce confuse rename the parts of linuxbios bios that run from	Eric Biederman
	ram linuxbios_ram instead of linuxbios_c and linuxbios_payload... - Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86 - ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB. - Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work. - Start using romcc's built in preprocessor (This will simplify header compiler checks) - Add helper functions for examining all of the resources - Remove debug strings from chip.h - Add llshell to src/arch/i386/llshell (Sometime later I can try it...) - Add the ability to catch exceptions on x86 - Add gdb_stub support to x86 - Removed old cpu options - Added an option so we can detect movnti support - Remove some duplicate definitions from pci_ids.h - Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic - Minor romcc bug fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-27	gcc uses slightly different syntax	Stefan Reinauer
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-22	return to debug	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1461 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-22	updates for the E325	Ronald G. Minnich
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1460 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12	- Add missing carriage return in ramtest.c	Eric Biederman
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17	- Minor mod to reset16.inc to work with newer binutils hopefully this works ↵	Eric Biederman
	with older ones... - Update apic.h to include the APIC_TASK_PRI register definition - Update mptable.c to have a reasonable board OEM and productid - Additional testfiles for romcc. - Split out auto.c and early failover.c moving their generic bits elsewere - Enable cache of the rom - Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-19	- Cleanups on the romcc side including a pci interface that uses	Eric Biederman
	fewer registers, and is easier to hardcode. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22	- Initial checkin of the freebios2 tree	Eric Biederman
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1