summaryrefslogtreecommitdiff
path: root/src/northbridge
AgeCommit message (Collapse)Author
2003-07-12- Remove all of the annoying $Id stringsEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12- Commit a working spd based memory initialization routineEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-19- Update the romcc version.Eric Biederman
- Add an additional consistency check to romcc and fix the more obvious problems it has uncovered With this update there are no known silent failures in romcc. - Update the memory initialization code to setup all 3 of the memory sizing registers properly - In auto.c test our dynamic maximum amount of ram. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-18- A new test case for romccEric Biederman
- Minor romcc fixes - In smbus_wail_until_done a romcc glitch with || in romcc where it likes to run out of registers. Use | to be explicit that I don't need the short circuiting behavior. - Remove unused #defines from coherent_ht.c - Update the test in auto.c to 512M - Add definition of log2 to romcc_io.h - Implement SPD memory sizing in raminit.c - Reduce the number of memory devices back 2 to for the SOLO board. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17added config and other test files.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17- Minor mod to reset16.inc to work with newer binutils hopefully this works ↵Eric Biederman
with older ones... - Update apic.h to include the APIC_TASK_PRI register definition - Update mptable.c to have a reasonable board OEM and productid - Additional testfiles for romcc. - Split out auto.c and early failover.c moving their generic bits elsewere - Enable cache of the rom - Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13More FB2 stuffGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13Freebios2Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12- Changes to the pci config routines moving them closer to the non romcc APIEric Biederman
The goal is to have the same interface with or without romcc. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-11- Factoring of auto.cEric Biederman
- Implementation of fallback/normal support for the amd solo board - Minor bugfix in romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-09Moved from freebiosGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-25- Commit a working pirq table for the AMD soloEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@799 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22- Initial checkin of the freebios2 treeEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1