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path: root/src/northbridge
AgeCommit message (Expand)Author
2013-07-10Drop some duplicates of PCI-e config functionsKyösti Mälkki
2013-07-10Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki
2013-07-09fox_wtm2: First step support for coreboot-based graphics startupRonald G. Minnich
2013-07-09FOX_WTM2: First pass at FUI.Ronald G. Minnich
2013-07-04intel/i5000: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-04Move select MMCONF_SUPPORT under northbridge (fix)Kyösti Mälkki
2013-07-04intel/i945: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-04intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULTKyösti Mälkki
2013-07-03Move select MMCONF_SUPPORT under northbridgeKyösti Mälkki
2013-07-02Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c`Paul Menzel
2013-07-02Make setting MAX_PIRQ_LINKs depend on NORTHBRIDGE_VIA_VX900Dave Frodin
2013-06-28amd/cimx/rd890/amd.h: Eliminate redefinition of NULLBruce Griffith
2013-06-28amd/agesa/family15/northbridge.c: Delete unused variableBruce Griffith
2013-06-28Add support to enable/disable builtin GbE (again)Stefan Reinauer
2013-06-27Revert "Add support to enable/disable builtin GbE"Kyösti Mälkki
2013-06-25Vortex86EX northbridge.c : Remove Vortex86DX PCI N/B related code.Andrew Wu
2013-06-25intel/sch: Use MMCONF_BASE_ADDRESSKyösti Mälkki
2013-06-24AMD: Drop empty root_complexKyösti Mälkki
2013-06-24AMD Fam15tn: Add support for AGESA runtime allocation in CBMEMRudolf Marek
2013-06-24AMD Fam15tn: Add IOMMU BAR allocation to northbridgeRudolf Marek
2013-06-22intel/sandybridge: Locate CBMEM TOC early in ramstageKyösti Mälkki
2013-06-22Add support for DMP Vortex86EX PCI northbridge.Andrew Wu
2013-06-21Add support to enable/disable builtin GbEStefan Reinauer
2013-06-20sandybridge: Store MRC cache in CBFSPatrick Georgi
2013-06-13AMD: Kconfig cleanupKyösti Mälkki
2013-06-10VX900: Use MIN/MAX from stdlib.h instead of redefining themAlexandru Gagniuc
2013-06-10VIA VX900: Add minimal ramstage needed to boot linuxAlexandru Gagniuc
2013-06-10VX900: Add DDR3 initializationAlexandru Gagniuc
2013-06-10VX900: Add support for early romstageAlexandru Gagniuc
2013-06-07i945: Add Display defines for int15h handler.Denis 'GNUtoo' Carikli
2013-06-05Intel 945: Select LAPIC_MONOTONIC_TIMER for X86EMU_DEBUG_TIMINGSDenis 'GNUtoo' Carikli
2013-06-04Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architectureRonald G. Minnich
2013-06-04AMD Northbridge LX: get rid of #include "northbridge/amd/lx/raminit.c"Christian Gmeiner
2013-06-04AMD Northbridge LX: convert spd_read_byte() to non-static versionChristian Gmeiner
2013-06-04AMD Northbridge LX: rename get_systop() to get_top_of_ram()Christian Gmeiner
2013-06-04AMD Northbridge LX: include northbridge.h in raminit.cChristian Gmeiner
2013-06-04AMD Northbridge LX: make GeodeLinkSpeed() function prototype non-staticChristian Gmeiner
2013-06-04AMD Northbridge LX: add some missing includesChristian Gmeiner
2013-06-04AMD Northbridge LX: make sdram_* function prototypes non-staticChristian Gmeiner
2013-06-04AMD Fam 15tn: Use all memory on systems with more than 4 GBSiyuan Wang
2013-06-03haswell: fix overflow handling TOUUDAaron Durbin
2013-06-03northbridge/amd/amdmct: Use `static const` instead of `const static`Paul Menzel
2013-05-25Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`Ronald G. Minnich
2013-05-23Intel Sandy Bridge: udelay.c: Change comparison from <= to <Paul Menzel
2013-05-22intel/gm45: Add more debug output to read/write trainingNico Huber
2013-05-22intel/gm45: Handle overflows during DDR3 write trainingNico Huber
2013-05-22intel/gm45: Refactor DDR3 write trainingNico Huber
2013-05-22intel/gm45: Handle overflows during DDR3 read trainingNico Huber
2013-05-22intel/gm45: Refactor DDR3 read trainingNico Huber
2013-05-22intel/gm45: Fix interpretation of VT-d disable bitNico Huber
2013-05-21intel/i5000: Remove unused copy of udelay.cNico Huber
2013-05-10Get rid of a number of __GNUC__ checksStefan Reinauer
2013-05-10northbridge/intel/i5000/udelay.c: Remove unused header `console.h`Paul Menzel
2013-05-10Drop prototype guarding for romccStefan Reinauer
2013-05-08Drop CONFIG_AP_CODE_IN_CARStefan Reinauer
2013-05-08hardwaremain: drop boot_complete parameterStefan Reinauer
2013-05-07haswell: use tsc for udelay()Aaron Durbin
2013-05-01boot: remove cbmem_post_handling()Aaron Durbin
2013-04-18Intel i945: ACPI: Add _OSC methodDenis 'GNUtoo' Carikli
2013-04-16Lenovo ThinkPad X60: Add Native VGA init.Denis 'GNUtoo' Carikli
2013-04-12Revert "siemens/sitemp_g1p1: Make ACPI report the right mmconf region"Nico Huber
2013-04-11Persimmon/Fam14/SB800 DSDT: Split into common areasMike Loptien
2013-04-10siemens/sitemp_g1p1: Make ACPI report the right mmconf regionPatrick Georgi
2013-04-04AMD GX1: Remove useless copied header file `northbridge.h`Paul Menzel
2013-04-03sandybridge: enable ROM cachingAaron Durbin
2013-03-29sandybridge: add option to mark graphics memory write-combining.Aaron Durbin
2013-03-29haswell: add option to mark graphics memory write-combining.Aaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-23resources: introduce reserved_ram_resource()Aaron Durbin
2013-03-22haswell: use dynamic cbmemAaron Durbin
2013-03-22coreboot: dynamic cbmem requirementAaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-21haswell/lynxpoint: Use new PCH/PM helper functionsDuncan Laurie
2013-03-21haswell: Drop the device ID check in graphics init pathDuncan Laurie
2013-03-21haswell: add multipurpose SMM memory regionAaron Durbin
2013-03-21haswell: use s3_resume field in romstage_handoffAaron Durbin
2013-03-21haswell: cbmem_get_table_location() implementationAaron Durbin
2013-03-20haswell: drop memory reservation for sandybridge GPU bugDuncan Laurie
2013-03-19AMD Fam15: Add SPD read functions to wrapper codeKimarie Hoot
2013-03-18haswell: move call site of save_mrc_data()Aaron Durbin
2013-03-18haswell: remove unused sys_info structureAaron Durbin
2013-03-18haswell: adjust CAR usageAaron Durbin
2013-03-18haswell: fix ACPI MCFG tableAaron Durbin
2013-03-18haswell: enable caching before SMM initializationAaron Durbin
2013-03-17haswell platforms: restructure romstage mainAaron Durbin
2013-03-17haswell: include TSEG region in cacheable memoryAaron Durbin
2013-03-17i945: Replace some two magic values by defined namesPatrick Georgi
2013-03-16haswell: don't add a 0-sized memory range resourceAaron Durbin
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2013-03-15haswell: Fix BDSM and BGSM indicies in memory mapAaron Durbin
2013-03-15haswell: reserve default SMRAM spaceAaron Durbin
2013-03-15haswell: resource allocationAaron Durbin
2013-03-14haswell: more ULT/LP support and minor tweaksDuncan Laurie
2013-03-14haswell: Add VGA PCI ID mappingsAaron Durbin
2013-03-14haswell: Add ULT device IDsDuncan Laurie
2013-03-14graysreef: update platform informationAaron Durbin
2013-03-14haswell: remove explicit pcie config accessesAaron Durbin
2013-03-14haswell: add PCI id supportAaron Durbin
2013-03-14haswell: Remove logic to send dram init done to MEAaron Durbin
2013-03-14haswell: notes and updates.Aaron Durbin
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