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path: root/src/northbridge
AgeCommit message (Expand)Author
2020-01-01nb/intel/sandybridge: Make `PM_PDWN_Config` uppercaseAngel Pons
2020-01-01nb/intel/sandybridge: add and use memory thermal configuration registersFelix Held
2020-01-01nb/intel/sandybridge: add and use ME stolen memory and lock bit definesFelix Held
2020-01-01nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BARFelix Held
2020-01-01nb/intel/sandybridge: add and use more MCHBAR register definesFelix Held
2020-01-01nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.hFelix Held
2020-01-01nb/intel/sandybridge: use MESEG register names from datasheetFelix Held
2019-12-31nb/amd: Fix typoElyes HAOUAS
2019-12-31src: Remove some romcc workaroundsJacob Garber
2019-12-31northbridge: Add missing include <device/pci_def.h>Elyes HAOUAS
2019-12-29nb/intel/sandybridge: simplify ME lock and memory enable bit writeFelix Held
2019-12-29nb/intel/sandybridge: add and use defines for ME base and mask registersFelix Held
2019-12-29nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registersFelix Held
2019-12-27arch/x86: Remove <arch/cbfs.h>Kyösti Mälkki
2019-12-26nb/haswell/minihd: correct subsystem IDMatt DeVillier
2019-12-20AGESA,binaryPI: Drop remains of ROMCC_BOOTBLOCKKyösti Mälkki
2019-12-20AMD {SoC, AGESA, binaryPI}: Don't use both of _ADR and _HIDMichał Żygowski
2019-12-20src: Replace min/max() with MIN/MAX()Elyes HAOUAS
2019-12-20{nb,soc}: Replace min/max() with MIN/MAX()Elyes HAOUAS
2019-12-19src/northbridge: Remove unused <stdlib.h>Elyes HAOUAS
2019-12-14Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID"Nico Huber
2019-12-14bootblock: Provide some common prototypesKyösti Mälkki
2019-12-13sb/amd/cimx/sb800: Postpone Sb_Poweron_Init() callKyösti Mälkki
2019-12-12nb/{haswell,i945,sandybridge}: Drop outdated commentElyes HAOUAS
2019-12-10mainboard/(i945,ich7): Remove commented RCBA32(0x341c) codeElyes HAOUAS
2019-12-09binaryPI boards: Bulk remove BINARYPI_LEGACY_WRAPPER remainsKyösti Mälkki
2019-12-06nb/i945: Fix typoElyes HAOUAS
2019-12-04amdblocks/acpimmio: Unify BIOSRAM usageMichał Żygowski
2019-12-02src: Move 'static' to the beginning of declarationElyes HAOUAS
2019-12-01nb/intel/x4x: Factor out hiding PCI devs in pure fnArthur Heymans
2019-11-30AGESA,binaryPI: Flag boards with ROMCC_BOOTBLOCKKyösti Mälkki
2019-11-29{northbridge,soc,southbridge}: Don't use both of _ADR and _HIDElyes HAOUAS
2019-11-27binaryPI: Drop BINARYPI_LEGACY_WRAPPER supportKyösti Mälkki
2019-11-26amd/pi/00730F01: Add support without BINARYPI_LEGACY_WRAPPERKrystian Hebel
2019-11-26nb/intel/sandybridge: Fix mrc.bin pathArthur Heymans
2019-11-25binaryPI: Use Kconfig to define the number of IOAPICsMichał Żygowski
2019-11-25cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-25Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans
2019-11-23Kconfig: comply to Linux 5.3's Kconfig language rulesPatrick Georgi
2019-11-21nb/sb/cpu: Drop Intel Rangeley supportArthur Heymans
2019-11-20nb/amd/fam10: Drop supportArthur Heymans
2019-11-20nb/via/vx900: Drop supportArthur Heymans
2019-11-20cpu/nb/sb: Remove fam12Joe Moore
2019-11-18nb/intel/sandybridge/mrc: Handle P2P disabling via devicetreeNico Huber
2019-11-18nb/intel/sandybridge: Set up console in bootblockArthur Heymans
2019-11-18nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-18nb/intel/sandybridge: Configure DCACHE_BSP_STACK_SIZEArthur Heymans
2019-11-18sb/intel/bd82x6x: Make the pch_enable_lpc hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_rcba_config hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_early_init hook optionalArthur Heymans
2019-11-15nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-15nb/intel/i945: Initialize console in bootblockArthur Heymans
2019-11-15nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-15nb/intel/i945: Move boilerplate romstage to a common locationArthur Heymans
2019-11-15nb/intel/x4x: Move boilerplate romstage to a common locationArthur Heymans
2019-11-14mb/*/*(ich7/x4x): Use common early southbridge initArthur Heymans
2019-11-14sb/intel/i82801jx: Move early sb init to a common placeArthur Heymans
2019-11-14sb/intel/i82801gx: Add common early codeArthur Heymans
2019-11-14nb/intel/i440bx: Remove unnecessary __SIMPLE_DEVICE__Arthur Heymans
2019-11-13nb/intel/x4x.h: Include stdint.hArthur Heymans
2019-11-13sb/intel/i82801gx: Add a function to set up BARArthur Heymans
2019-11-11fsp{rangeley,baytrail,broadwell_de}: Fix dead assignmentElyes HAOUAS
2019-11-08arch/x86: Drop some __SMM__ guardsKyösti Mälkki
2019-11-05intel/i440bx: Switch to UDELAY_TSC and TSC_MONOTONIC_TIMERKyösti Mälkki
2019-11-04nb/intel: Use defined DEFAULT_RCBAElyes HAOUAS
2019-11-04nb/intel/nehalem: Fix 'dead assignment'Elyes HAOUAS
2019-11-04nb/intel/x4x/x4x.h: Include iomap.hArthur Heymans
2019-11-03arch/x86: Use the stage argument to implement cbmem_topArthur Heymans
2019-11-03cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki
2019-11-02nb/intel/gm45: Add VBOOT supportArthur Heymans
2019-11-01lib/cbmem_top: Add a common cbmem_top implementationArthur Heymans
2019-11-01nb/intel: Remove unused 'barrier()'Elyes HAOUAS
2019-10-29nb/intel/{nehalem,x4x}: Remove unused 'include <pc80/vga_io.h>'Elyes HAOUAS
2019-10-28nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK supportArthur Heymans
2019-10-28src: Remove unused '#include <cpu/cpu.h>'Elyes HAOUAS
2019-10-27src/[northbridge,security]: change "unsigned" to "unsigned int"Martin Roth
2019-10-24acpi: Drop wrong _ADR objects for PCI host bridgesElyes HAOUAS
2019-10-21src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'Elyes HAOUAS
2019-10-17nb/intel/nehalem/vboot: Ignore invalid POSTINIT on TPM startupArthur Heymans
2019-10-17nb/intel/nehalem: Only enable_smbus onceArthur Heymans
2019-10-17nb/intel/nehalem: use pmclib to detect S3 resumeArthur Heymans
2019-10-17nb/intel/nehalem: Add some debug outputArthur Heymans
2019-10-17nb/intel/nehalem: Change the output verbosity of raminit timingsArthur Heymans
2019-10-14nb/intel/gm45: Don't run graphics init on s3 resumeArthur Heymans
2019-10-14sb/intel/i82801ix: Add common code to set up LPC IO decode rangesArthur Heymans
2019-10-13nb/intel/nehalem: Start VBOOT in bootblock with a separate verstageArthur Heymans
2019-10-13nb/intel/nehalem: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-10-13sb/intel/ibexpeak: Move some early PCH init after console initArthur Heymans
2019-10-11sb/intel/i82801gx: Move CIR init to a common placeArthur Heymans
2019-10-10nb/intel/pineview/Kconfig: Remove romcc leftoverArthur Heymans
2019-10-08device: Use scan_static_bus() over scan_lpc_bus()Nico Huber
2019-10-06sb/intel/nm10: Fix enabling HPETArthur Heymans
2019-10-06nb/intel/nehalem: Don't run graphic init on S3 resumeArthur Heymans
2019-10-06nb/intel/nehalem: Move PCH init to sb/intel/ibexpeakArthur Heymans
2019-10-06nb/intel/nehalem: Move romstage boilerplate to a common locationArthur Heymans
2019-10-06nb/intel/nehalem: Don't link walkcbfs.S in romstageArthur Heymans
2019-10-06nb/intel/nehalem: Remove bogus GT PM initArthur Heymans
2019-10-06nb/intel/nehalem: Disable PEG and IGD based on devicetreeArthur Heymans
2019-10-06nb/nehalem: Remove bogus MCHBAR writesArthur Heymans
2019-10-05kontron/986lcd-m,roda/rk886ex: Drop secondary PCI resetKyösti Mälkki
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