Age | Commit message (Expand) | Author |
2020-01-02 | amd/acpi: Drop empty PCSD device nodes | Nico Huber |
2020-01-02 | src: Remove unneeded 'include <arch/io.h>' | Elyes HAOUAS |
2020-01-01 | nb/intel/sandybridge: replace .val_4028 with .io_latency | Felix Held |
2020-01-01 | nb/intel/sandybridge/sandybridge.h: Do cosmetic fixes | Angel Pons |
2020-01-01 | nb/intel/sandybridge: Use the MC_BIOS_DATA define | Angel Pons |
2020-01-01 | nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase | Angel Pons |
2020-01-01 | nb/intel/sandybridge: add and use memory thermal configuration registers | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use ME stolen memory and lock bit defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BAR | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use more MCHBAR register defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.h | Felix Held |
2020-01-01 | nb/intel/sandybridge: use MESEG register names from datasheet | Felix Held |
2019-12-31 | nb/amd: Fix typo | Elyes HAOUAS |
2019-12-31 | src: Remove some romcc workarounds | Jacob Garber |
2019-12-31 | northbridge: Add missing include <device/pci_def.h> | Elyes HAOUAS |
2019-12-29 | nb/intel/sandybridge: simplify ME lock and memory enable bit write | Felix Held |
2019-12-29 | nb/intel/sandybridge: add and use defines for ME base and mask registers | Felix Held |
2019-12-29 | nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers | Felix Held |
2019-12-27 | arch/x86: Remove <arch/cbfs.h> | Kyösti Mälkki |
2019-12-26 | nb/haswell/minihd: correct subsystem ID | Matt DeVillier |
2019-12-20 | AGESA,binaryPI: Drop remains of ROMCC_BOOTBLOCK | Kyösti Mälkki |
2019-12-20 | AMD {SoC, AGESA, binaryPI}: Don't use both of _ADR and _HID | Michał Żygowski |
2019-12-20 | src: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
2019-12-20 | {nb,soc}: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
2019-12-19 | src/northbridge: Remove unused <stdlib.h> | Elyes HAOUAS |
2019-12-14 | Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID" | Nico Huber |
2019-12-14 | bootblock: Provide some common prototypes | Kyösti Mälkki |
2019-12-13 | sb/amd/cimx/sb800: Postpone Sb_Poweron_Init() call | Kyösti Mälkki |
2019-12-12 | nb/{haswell,i945,sandybridge}: Drop outdated comment | Elyes HAOUAS |
2019-12-10 | mainboard/(i945,ich7): Remove commented RCBA32(0x341c) code | Elyes HAOUAS |
2019-12-09 | binaryPI boards: Bulk remove BINARYPI_LEGACY_WRAPPER remains | Kyösti Mälkki |
2019-12-06 | nb/i945: Fix typo | Elyes HAOUAS |
2019-12-04 | amdblocks/acpimmio: Unify BIOSRAM usage | Michał Żygowski |
2019-12-02 | src: Move 'static' to the beginning of declaration | Elyes HAOUAS |
2019-12-01 | nb/intel/x4x: Factor out hiding PCI devs in pure fn | Arthur Heymans |
2019-11-30 | AGESA,binaryPI: Flag boards with ROMCC_BOOTBLOCK | Kyösti Mälkki |
2019-11-29 | {northbridge,soc,southbridge}: Don't use both of _ADR and _HID | Elyes HAOUAS |
2019-11-27 | binaryPI: Drop BINARYPI_LEGACY_WRAPPER support | Kyösti Mälkki |
2019-11-26 | amd/pi/00730F01: Add support without BINARYPI_LEGACY_WRAPPER | Krystian Hebel |
2019-11-26 | nb/intel/sandybridge: Fix mrc.bin path | Arthur Heymans |
2019-11-25 | binaryPI: Use Kconfig to define the number of IOAPICs | Michał Żygowski |
2019-11-25 | cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-25 | Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol | Arthur Heymans |
2019-11-23 | Kconfig: comply to Linux 5.3's Kconfig language rules | Patrick Georgi |
2019-11-21 | nb/sb/cpu: Drop Intel Rangeley support | Arthur Heymans |
2019-11-20 | nb/amd/fam10: Drop support | Arthur Heymans |
2019-11-20 | nb/via/vx900: Drop support | Arthur Heymans |
2019-11-20 | cpu/nb/sb: Remove fam12 | Joe Moore |
2019-11-18 | nb/intel/sandybridge/mrc: Handle P2P disabling via devicetree | Nico Huber |
2019-11-18 | nb/intel/sandybridge: Set up console in bootblock | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Configure DCACHE_BSP_STACK_SIZE | Arthur Heymans |
2019-11-18 | sb/intel/bd82x6x: Make the pch_enable_lpc hook optional | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Make the mainboard_rcba_config hook optional | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Make the mainboard_early_init hook optional | Arthur Heymans |
2019-11-15 | nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-15 | nb/intel/i945: Initialize console in bootblock | Arthur Heymans |
2019-11-15 | nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-15 | nb/intel/i945: Move boilerplate romstage to a common location | Arthur Heymans |
2019-11-15 | nb/intel/x4x: Move boilerplate romstage to a common location | Arthur Heymans |
2019-11-14 | mb/*/*(ich7/x4x): Use common early southbridge init | Arthur Heymans |
2019-11-14 | sb/intel/i82801jx: Move early sb init to a common place | Arthur Heymans |
2019-11-14 | sb/intel/i82801gx: Add common early code | Arthur Heymans |
2019-11-14 | nb/intel/i440bx: Remove unnecessary __SIMPLE_DEVICE__ | Arthur Heymans |
2019-11-13 | nb/intel/x4x.h: Include stdint.h | Arthur Heymans |
2019-11-13 | sb/intel/i82801gx: Add a function to set up BAR | Arthur Heymans |
2019-11-11 | fsp{rangeley,baytrail,broadwell_de}: Fix dead assignment | Elyes HAOUAS |
2019-11-08 | arch/x86: Drop some __SMM__ guards | Kyösti Mälkki |
2019-11-05 | intel/i440bx: Switch to UDELAY_TSC and TSC_MONOTONIC_TIMER | Kyösti Mälkki |
2019-11-04 | nb/intel: Use defined DEFAULT_RCBA | Elyes HAOUAS |
2019-11-04 | nb/intel/nehalem: Fix 'dead assignment' | Elyes HAOUAS |
2019-11-04 | nb/intel/x4x/x4x.h: Include iomap.h | Arthur Heymans |
2019-11-03 | arch/x86: Use the stage argument to implement cbmem_top | Arthur Heymans |
2019-11-03 | cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE | Kyösti Mälkki |
2019-11-02 | nb/intel/gm45: Add VBOOT support | Arthur Heymans |
2019-11-01 | lib/cbmem_top: Add a common cbmem_top implementation | Arthur Heymans |
2019-11-01 | nb/intel: Remove unused 'barrier()' | Elyes HAOUAS |
2019-10-29 | nb/intel/{nehalem,x4x}: Remove unused 'include <pc80/vga_io.h>' | Elyes HAOUAS |
2019-10-28 | nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support | Arthur Heymans |
2019-10-28 | src: Remove unused '#include <cpu/cpu.h>' | Elyes HAOUAS |
2019-10-27 | src/[northbridge,security]: change "unsigned" to "unsigned int" | Martin Roth |
2019-10-24 | acpi: Drop wrong _ADR objects for PCI host bridges | Elyes HAOUAS |
2019-10-21 | src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>' | Elyes HAOUAS |
2019-10-17 | nb/intel/nehalem/vboot: Ignore invalid POSTINIT on TPM startup | Arthur Heymans |
2019-10-17 | nb/intel/nehalem: Only enable_smbus once | Arthur Heymans |
2019-10-17 | nb/intel/nehalem: use pmclib to detect S3 resume | Arthur Heymans |
2019-10-17 | nb/intel/nehalem: Add some debug output | Arthur Heymans |
2019-10-17 | nb/intel/nehalem: Change the output verbosity of raminit timings | Arthur Heymans |
2019-10-14 | nb/intel/gm45: Don't run graphics init on s3 resume | Arthur Heymans |
2019-10-14 | sb/intel/i82801ix: Add common code to set up LPC IO decode ranges | Arthur Heymans |
2019-10-13 | nb/intel/nehalem: Start VBOOT in bootblock with a separate verstage | Arthur Heymans |
2019-10-13 | nb/intel/nehalem: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-10-13 | sb/intel/ibexpeak: Move some early PCH init after console init | Arthur Heymans |
2019-10-11 | sb/intel/i82801gx: Move CIR init to a common place | Arthur Heymans |
2019-10-10 | nb/intel/pineview/Kconfig: Remove romcc leftover | Arthur Heymans |
2019-10-08 | device: Use scan_static_bus() over scan_lpc_bus() | Nico Huber |
2019-10-06 | sb/intel/nm10: Fix enabling HPET | Arthur Heymans |
2019-10-06 | nb/intel/nehalem: Don't run graphic init on S3 resume | Arthur Heymans |
2019-10-06 | nb/intel/nehalem: Move PCH init to sb/intel/ibexpeak | Arthur Heymans |
2019-10-06 | nb/intel/nehalem: Move romstage boilerplate to a common location | Arthur Heymans |