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path: root/src/northbridge
AgeCommit message (Expand)Author
2020-08-03nb/intel/ironlake: Add SAD DRAM register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Correct PCIEXBAR definitionAngel Pons
2020-08-03nb/intel/ironlake: Add definition for SAD PCI deviceAngel Pons
2020-08-03nb/intel/ironlake: Drop `D0F0_` prefix from register namesAngel Pons
2020-08-03nb/intel/ironlake: Rename memory map variablesAngel Pons
2020-08-03nb/intel/ironlake/raminit.c: Drop unused defineAngel Pons
2020-08-03nb/intel/ironlake/hostbridge_regs: Drop D0F0_PMBASEAngel Pons
2020-08-03nb/intel/ironlake/hostbridge_regs.h: Clean up registersAngel Pons
2020-08-03nb/intel/ironlake: Put host bridge registers into its own fileAngel Pons
2020-08-03nb/intel/pineview/hostbridge_regs.h: Clean up registersAngel Pons
2020-08-03nb/intel/pineview: Put host bridge registers into its own fileAngel Pons
2020-08-03nb/intel/x4x/hostbridge_regs.h: Clean up registersAngel Pons
2020-08-03nb/intel/x4x: Put host bridge registers into its own fileAngel Pons
2020-08-03nb/intel/haswell: Add Crystal Well PCI IDsIru Cai
2020-07-31nb/intel/haswell: Configure VCs on Egress PortAngel Pons
2020-07-30nb/intel/x4x/rcven.c: Rename memory barrier functionAngel Pons
2020-07-30nb/intel/*: Fill in SMBIOS type 16 on SNB/HSWPatrick Rudolph
2020-07-28nb/intel/i945/gma.c: Remove extra indentationElyes HAOUAS
2020-07-28nb/intel/haswell: Enable DMI ASPMAngel Pons
2020-07-26nb/amd/pi/00730F01/northbridge.c: Add include <types.h>Elyes HAOUAS
2020-07-26src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth
2020-07-26nb/intel/haswell: Use macro for dimm->bus_widthElyes HAOUAS
2020-07-26nb/intel/sandybridge: Add missing includesElyes HAOUAS
2020-07-25nb/intel/ironlake/raminit.c: initialize 'reply.command'Elyes HAOUAS
2020-07-25nb/intel/haswell/hostbridge_regs.h: Clean up registersAngel Pons
2020-07-24nb/intel/sandybridge: Put host bridge registers into its own fileAngel Pons
2020-07-24nb/intel/haswell: Put host bridge registers into its own fileAngel Pons
2020-07-24nb/intel/sandybridge: Remove unnecessary `struct sys_info`Angel Pons
2020-07-24nb/intel/ironlake: Move southbridge code to ibexpeakAngel Pons
2020-07-22nb/intel/i945: Put names to northbridge PCI devicesAngel Pons
2020-07-20sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASEAngel Pons
2020-07-14src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS
2020-07-14src: Remove unused 'include <stdint.h>Elyes HAOUAS
2020-07-14src: Remove unused 'include <types.h>'Elyes HAOUAS
2020-07-12nb/intel/haswell/romstage.c: Align pei_data initializersAngel Pons
2020-07-12haswell: Move some MRC settings to devicetreeAngel Pons
2020-07-12haswell: Automatically check if Intel GbE is to be enabledAngel Pons
2020-07-12haswell: Add function to retrieve SPD addressesAngel Pons
2020-07-12haswell: Automatically determine system typeAngel Pons
2020-07-12haswell: Introduce ENABLE_DDR_2X_REFRESH Kconfig optionAngel Pons
2020-07-12haswell: Factor out `max_ddr3_freq`Angel Pons
2020-07-12haswell: Compute disabled channel masks at runtimeAngel Pons
2020-07-12mb/asrock/b85m_pro4: Factor out common MRC settingsAngel Pons
2020-07-12haswell: Relocate `mainboard_romstage_entry` to northbridgeAngel Pons
2020-07-12haswell: Drop `struct romstage_params` typeAngel Pons
2020-07-12haswell: Make `copy_spd` a weak functionAngel Pons
2020-07-11nb/intel/haswell: Add `mb_late_romstage_setup` functionAngel Pons
2020-07-11arch/x86: Drop CBMEM_TOP_BACKUPKyösti Mälkki
2020-07-11nb/intel/i945: Drop dead codeAngel Pons
2020-07-10nb/amd/agesa/agesa_helper.h: Drop dead codeAngel Pons
2020-07-09nb/intel/gm45/acpi/gm45.asl: Drop dead codeAngel Pons
2020-07-09nb/intel/ironlake/raminit.c: Drop dead codeAngel Pons
2020-07-09haswell: Drop GPIO indirection layersAngel Pons
2020-07-09haswell: Turn RCBA configuration into a functionAngel Pons
2020-07-08haswell: relocate `romstage_common` to northbridgeAngel Pons
2020-07-08haswell: drop unused function parameterAngel Pons
2020-07-08nb/intel/pineview/acpi: Remove unmatched comment startAngel Pons
2020-07-08nb/intel/pineview: Convert to ASL 2.0 syntaxAngel Pons
2020-07-08nb/intel/pineview: Tidy up comments and cosmeticsAngel Pons
2020-07-08nb/intel/i945: Use ASL 2.0 syntaxAngel Pons
2020-07-08nb/intel/i945/acpi: Tidy up comments and cosmeticsAngel Pons
2020-07-08nb/intel/gm45: Use ASL 2.0 syntaxAngel Pons
2020-07-08nb/intel/gm45: Tidy up comments and cosmeticsAngel Pons
2020-07-08nb/intel/x4x/acpi: Use ASL 2.0 syntaxAngel Pons
2020-07-08nb/intel/x4x/acpi: Clean up commentsAngel Pons
2020-07-08nb/intel/haswell/acpi: Update to ASL 2.0 syntaxAngel Pons
2020-07-08nb/intel/haswell/acpi: Fix host bridge registersAngel Pons
2020-07-06nb/intel/i440bx: Add PMCR register to ACPI codeKeith Hui
2020-07-06nb/intel/i440bx: Refactor ACPI codeKeith Hui
2020-07-02nb/intel/ironlake: Clean up code style (except raminit)Angel Pons
2020-07-01nb/intel/ironlake/northbridge.c: Drop thunk functionsAngel Pons
2020-07-01nb/intel/ironlake: Drop copy-pasted and unused macroAngel Pons
2020-07-01nb/intel/ironlake: Use `pci_update_config32()`Angel Pons
2020-07-01nb/intel/ironlake: Simplify BAR handlingAngel Pons
2020-07-01nb/intel/ironlake/ironlake.h: Clean upAngel Pons
2020-07-01nb/intel/ironlake: Drop copy-pasted and dead codeAngel Pons
2020-07-01nb/intel/ironlake: Remove unused structsAngel Pons
2020-07-01nb/intel/pineview: Drop undefined function declarationAngel Pons
2020-06-27sb/intel/i82801ix: Use pmutil.h definitionsAngel Pons
2020-06-22nb/intel/sandybridge/gma.c: Remove useless if conditionEvgeny Zinoviev
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-06-22nb/intel/haswell: Use 16-bit ops on PCI COMMANDAngel Pons
2020-06-15i945 boards: Factor out MAX_CPUSAngel Pons
2020-06-15x4x boards: Factor out MAX_CPUSAngel Pons
2020-06-12nb/intel/i945/rcven.c: Correct commentAngel Pons
2020-06-12nb/intel/i945: Clean up raminit coding styleAngel Pons
2020-06-10nb/intel/i945: Use PCI bitwise opsAngel Pons
2020-06-10nb/intel/x4x: Drop unused `pci_ops.h` includeAngel Pons
2020-06-10nb/intel/pineview: Use PCI bitwise opsAngel Pons
2020-06-09nb/intel/x4x: Use PCI bitwise opsAngel Pons
2020-06-09nb/intel/haswell: Use PCI bitwise opsAngel Pons
2020-06-09nb/intel/sandybridge: Use MCHBAR bitwise opsAngel Pons
2020-06-09nb/intel/sandybridge: Use PCI bitwise opsAngel Pons
2020-06-09nb/intel/gm45/iommu.c: Fix regression when updating PCI commandAngel Pons
2020-06-06src: Use pci_dev_ops_pci where applicableAngel Pons
2020-06-06src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS
2020-06-06src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS
2020-06-03northbridge/intel/sandybridge: Mask lower 20 bits of TOLUD and TOLM in hostbr...Furquan Shaikh
2020-06-03northbridge/intel/sandybridge: Update hostbridge.asl to ASL2.0 syntaxFurquan Shaikh
2020-06-03northbridge/intel/haswell: Mask lower 20 bits of TOLUD and TOLM in hostbridge...Furquan Shaikh
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