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path: root/src/northbridge
AgeCommit message (Expand)Author
2012-10-26northbridge/sch: don't overwrite hightables with GPU / TSEG memorySebastian Andrzej Siewior
2012-10-08hpet: common ACPI generationPatrick Georgi
2012-10-07Remove chip.h files without config structureKyösti Mälkki
2012-09-25HAVE_HIGH_TABLES is gonePatrick Georgi
2012-09-19agesa fam15 northbridge: change lapic_id to accommodate two CPUsSiyuan Wang
2012-08-28Fix AMD UMA for RS780Kyösti Mälkki
2012-08-27AMD northbridges: factor out CPU allocationKyösti Mälkki
2012-08-27AMD northbridges: rewrite CPU allocationKyösti Mälkki
2012-08-22Auto-declare chip_operationsKyösti Mälkki
2012-08-09AMD northbridge: copy TOP_MEM and TOP_MEM2 for distributionKyösti Mälkki
2012-08-09Sandybridge: Fix integer overrun in romstage udelay()Stefan Reinauer
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
2012-08-07Move cpus_ready_for_init() to AMD K8Kyösti Mälkki
2012-08-07Sandy/Ivy Bridge and Cougar/Panther Point: Fix namesStefan Reinauer
2012-08-05AMD f15: Change multiply ONE_MB to bit shifting (Propagation)zbao
2012-08-04AMD f15 nb: Remove the misleading 0x100 from the limitk (Propagation)zbao
2012-08-04AMD NB: Limit the device field to 5 bits. (Propagation)zbao
2012-08-02Limit the device field to 5 bits.zbao
2012-08-02AMD and GFXUMA: move setup_uma_memory() to northbridgeKyösti Mälkki
2012-08-02AMD Agesa and GFXUMA: drop use of uma_memory_baseKyösti Mälkki
2012-08-02AMD K8 and AMDFAM10, GFXUMA: drop use of uma_memory_baseKyösti Mälkki
2012-08-01AMD F15tn northbridge: Remove the misleading 0x100 from the limitk.zbao
2012-08-01Intel and GFXUMA: drop redundant use of lb_add_memory_range()Kyösti Mälkki
2012-08-01Intel Sandybridge and UMA: use mmio_resource()Kyösti Mälkki
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-30sandybridge: reinitialize usbdebug after MRCSven Schnelle
2012-07-27Intel and GFXUMA: fix MTRR and use uma_resource()Kyösti Mälkki
2012-07-27Intel 82810 and 82830: always room for PCI memoryKyösti Mälkki
2012-07-27Intel i945 and sch: no memory over 4GBKyösti Mälkki
2012-07-26Refactor driver structsPatrick Georgi
2012-07-26amd/lx: Move configuration from source to KconfigPatrick Georgi
2012-07-26CTDP: Only do TDP down/nominal change from TNP0Duncan Laurie
2012-07-26ACPI: Add support for runtime config TDP downDuncan Laurie
2012-07-25Change multiply ONE_MB to bit shifting.zbao
2012-07-25sync the northbridge.c with other family.zbao
2012-07-25ELOG: Add support for a monotonic boot counter in CMOSDuncan Laurie
2012-07-25More descriptive error messages in Sandybridge raminit codeStefan Reinauer
2012-07-24ELOG: Fix boot count increment for non-wake caseDuncan Laurie
2012-07-24Ivybridge: fix workaround and enable PAIRDuncan Laurie
2012-07-24CPU: Add basic support for Nominal Configurable TDPDuncan Laurie
2012-07-24Rename cache_lbmem() to cache_ramstage()Stefan Reinauer
2012-07-24Make ACPI code detect Sandy/Ivy Bridge dynamicallyStefan Reinauer
2012-07-24Drop (empty) sandybridge_late_initialization()Stefan Reinauer
2012-07-24Add support for HM70 and NM70 LPC bridgeStefan Reinauer
2012-07-24Print PCI ID of PCH during boot upStefan Reinauer
2012-07-24Drop leading spaces from CPU name stringStefan Reinauer
2012-07-24Fix MRC cache update delaysStefan Reinauer
2012-07-24SandyBridge: Add another PCI device ID for northbridgeWalter Murphy
2012-07-24Fixes to enable RC6 on IvyBridgeDuncan Laurie
2012-07-22i945: Disable IGD if plugin VGA is preferredPatrick Georgi
2012-07-22Trinity wrapper code improvement.zbao
2012-07-20Fix udelay() implementation for i945 romstageNico Huber
2012-07-20Drop VGA_BRIDGE_SETUP config optionPatrick Georgi
2012-07-20Intel SCH northbridge: fix resource indexKyösti Mälkki
2012-07-16Drop invalid device ops on Agesa northbridgeKyösti Mälkki
2012-07-16AMD: Fix GFXUMA with 4GB or more RAMKyösti Mälkki
2012-07-16Move setup_uma_memory() to K8 northbridgeKyösti Mälkki
2012-07-16Move setup_uma_memory() to AMDFAM10 northbridgeKyösti Mälkki
2012-07-16Move setup_uma_memory() to Agesa Family14 northbridgeKyösti Mälkki
2012-07-16Move setup_uma_memory() to Agesa Family12 northbridgeKyösti Mälkki
2012-07-16Move setup_uma_memory() to Agesa Family15 northbridgeKyösti Mälkki
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-07-16Add global uma_resource()Kyösti Mälkki
2012-07-16i5000: Fix resource allocationSven Schnelle
2012-07-09i5000: reset system if raminit failsSven Schnelle
2012-07-06i5000: Add PCI ids for all i5000 flavoursSven Schnelle
2012-07-06i945: Reset IGD on bootPatrick Georgi
2012-07-03AGESA F15 wrapper for Trinityzbao
2012-06-21Don't use 64-bit constant 0x100000000 in linker scriptsNico Huber
2012-06-20i5000: fix another typoSven Schnelle
2012-06-20i5000: fix typosSven Schnelle
2012-06-18i5000: enforce hard resetSven Schnelle
2012-05-29Sandybridge: Remove remnants of FDT support from MRC cache codeStefan Reinauer
2012-05-29Sandybridge: Fix MRC cache calculationStefan Reinauer
2012-05-24cbtypes.h: Unify cbtypes.h used in AMD board's codeVikram Narayanan
2012-05-11Hook up MRC cache updateStefan Reinauer
2012-05-11Rework Sandybridge MRC cache handlingStefan Reinauer
2012-05-08Some more #if cleanupPatrick Georgi
2012-05-08Clean up #ifsPatrick Georgi
2012-05-03Add missing newline to printk in Sandybridge init codeStefan Reinauer
2012-05-02Make Intel i5000 specific options only appear on i5000 systemsStefan Reinauer
2012-05-02Strip quotes from Sandybridge MRC blobStefan Reinauer
2012-05-02Sandybridge: Display platform information earlyVadim Bendebury
2012-05-01Update Ivybridge GT power meter tablesDuncan Laurie
2012-05-01Update ivybridge graphics initializationDuncan Laurie
2012-05-01Only send ME Dram Init Done message on SandybridgeDuncan Laurie
2012-05-01Modify DMI init for IvyBridgeVincent Palatin
2012-05-01Fix Sandybridge/Ivybridge mainboards according to code reviewStefan Reinauer
2012-04-30Sandybridge: Temporarily disable MRC cache finding codeStefan Reinauer
2012-04-30Add default map_oprom_vendev() for AMD Family 14h processors.Martin Roth
2012-04-28Reverse Vendor ID & Device ID for map_oprom_vendev()Martin Roth
2012-04-27SMM: Add udelay on Sandybridge systemsStefan Reinauer
2012-04-21Intel e7505: build as separate object fileKyösti Mälkki
2012-04-21Intel e7505: enable ECC scrubbingKyösti Mälkki
2012-04-20Refactor some alignment handlingPatrick Georgi
2012-04-19Intel e7505: refactor onlyKyösti Mälkki
2012-04-17Intel e7505: handlers for undocumented registersKyösti Mälkki
2012-04-16S3 code in coreboot public folder.zbao
2012-04-12Unify IO APIC address specificationPatrick Georgi
2012-04-11Intel e7505: cleanupsKyösti Mälkki
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