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Author
2016-04-16
northbridge/amd/{lx,gx2}: remove immediate accesses of 0
Patrick Georgi
2016-04-13
amd/agesa/family12/dimmSpd.c: Indent (tab) fix
Edward O'Callaghan
2016-04-11
and/nb/mct_ddr3: Pack all structures passed to ramstage and set alignment
Timothy Pearson
2016-04-11
nb/amd/amdfam10: Write MCT variables to flash after PCI configuration
Timothy Pearson
2016-04-10
nb/intel/sandybridge/raminit: always use mrccache
Patrick Rudolph
2016-04-08
Revert "nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed"
Timothy Pearson
2016-04-08
nb/amd/mct_ddr3: Reenable sync flood after ECC init
Timothy Pearson
2016-04-08
nb/amd/mct_ddr3: Add MCE reporting logic
Timothy Pearson
2016-04-08
nb/amd/amdfam10: Only flag machine check exception if valid bit is set
Timothy Pearson
2016-04-08
nb/amd/mct_ddr3: Cache whether ECC is allowed at the platform level
Timothy Pearson
2016-04-05
nb/intel/sandybridge/raminit: die in toplevel function
Patrick Rudolph
2016-04-05
nb/intel/sandybridge/raminit: prepare raminit for fallback
Patrick Rudolph
2016-04-01
nb/amd/mct_ddr3: Fix revision mask for DR processors
Timothy Pearson
2016-03-31
nb/amd_mct_ddr3: Move DRAM MCE sync flood enable to ramstage
Timothy Pearson
2016-03-31
nb/amd/mct_ddr3: Clear early MCEs and report DRAM MCEs
Timothy Pearson
2016-03-31
nb/amd/mct_ddr3: Disable MCE framework during DRAM training
Timothy Pearson
2016-03-30
nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed
Timothy Pearson
2016-03-30
northbridge/amd/amdfam10: Add family15h model10h-1fh (Trinity)
Damien Zammit
2016-03-30
nb/intel/sandybridge/raminit: move ram training into seperate function
Patrick Rudolph
2016-03-29
nb/intel/sandybridge/raminit: move dimm_info into ramctr_timing
Patrick Rudolph
2016-03-28
nb/amd/mct_ddr3: Use standard C function calls in mct_ResetDataStruct_D()
Timothy Pearson
2016-03-26
nb/amd/amdmct: Select max_lanes based on ECC presence or absence
Damien Zammit
2016-03-24
nb/amd/mct_ddr3: Set the NBP0 read latency from P0 trained values
Timothy Pearson
2016-03-23
nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_...
Timothy Pearson
2016-03-21
nb/amd/amdmct/mct_ddr3: Ensure BlockRxDqsLock does not remain set
Timothy Pearson
2016-03-16
cpu/x86/mtrr: move cache_ramstage() to its only user
Aaron Durbin
2016-03-13
nb/amd/mct_ddr3: Use correct initial UI setting during DRAM training
Timothy Pearson
2016-03-13
northbridge/intel/i3100: Unify UDELAY selection
Stefan Reinauer
2016-03-13
northbridge/intel/i82810: Unify UDELAY selection
Stefan Reinauer
2016-03-12
northbridge/intel/i82830: Unify UDELAY selection
Stefan Reinauer
2016-03-12
nb/amd/mct_ddr3: Consolidate duplicated code
Timothy Pearson
2016-03-11
northbridge/intel: move mrccache.c of sandybridge + haswell to common
Alexander Couzens
2016-03-11
northbridge/intel: move mrc_cache definition into a common header
Alexander Couzens
2016-03-11
nortbridge/sandybridge/mrccache: parse the return code of flash->write
Alexander Couzens
2016-03-11
nb/amd/mct_ddr3: Train correct receiver in TrainDQSRdWrPos_D_Fam15
Timothy Pearson
2016-03-11
nb/amd/mct_ddr3: Consolidate calls to MCT minimum clock setting fetch
Timothy Pearson
2016-03-11
nb/amd/mct_ddr3: Require minumum training quality for both read and write
Timothy Pearson
2016-03-11
nb/amd/mct_ddr3: Set read DQS delay to 1UI before calculating read latency
Timothy Pearson
2016-03-11
nb/amd/mct_ddr3: Properly initialize arrays and add bounds checks
Timothy Pearson
2016-03-11
nb/amd/mct_ddr3: Restore previous DQS delay values on failed loop
Timothy Pearson
2016-03-11
northbridge/i945/gma: Re-enable NVRAM tft_brightness
Alexander Couzens
2016-03-10
northbridge/intel/i440bx: Unify UDELAY selection
Stefan Reinauer
2016-03-09
northbridge/intel/gm45: Use TSC for ramstage timer per default
Stefan Reinauer
2016-03-05
sandybridge/gma_lvds: support both Sandy&Ivy on one board
Iru Cai
2016-03-03
nb/intel/sandybridge/raminit: Fill SMBIOS type17 info
Patrick Rudolph
2016-03-02
nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk
Patrick Rudolph
2016-03-02
nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic
Patrick Rudolph
2016-02-28
northbridge/intel: add missing #include guards
Iru Cai
2016-02-26
nb/intel/sandybridge/raminit: Adjust timB to prevent overflow
Patrick Rudolph
2016-02-26
tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"
Denis 'GNUtoo' Carikli
2016-02-20
nb/intel/sandybridge/raminit: Add XMP support
Patrick Rudolph
2016-02-19
nb/amd/amdmct: Add socket specific configuration for FM2
Damien Zammit
2016-02-19
nb/intel/sandybridge/raminit: Improve logging
Patrick Rudolph
2016-02-18
nb/intel/sandybridge: Start PEG link training
Patrick Rudolph
2016-02-18
southbridge/intel/bd82x6x: Use common gpio.c
Patrick Rudolph
2016-02-16
nb/intel/sandybridge/raminit: Add shift offset
Patrick Rudolph
2016-02-13
sandybridge: Always include MRC if not using native RAM init.
Vladimir Serbinenko
2016-02-12
Make MRC vs native a config rather than making a separate chipset for it.
Vladimir Serbinenko
2016-02-12
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Vladimir Serbinenko
2016-02-10
Kconfig: Move defaults for CBFS_SIZE
Martin Roth
2016-02-09
sandybridge: Set all native gfx-related options in northbridge code.
Vladimir Serbinenko
2016-02-09
ivy: Add a possiblity for mainboard early init.
Vladimir Serbinenko
2016-02-09
Revert "northbridge/intel/peg: Disable unused ports"
Nico Huber
2016-02-05
nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h
Timothy Pearson
2016-02-05
nb/amd/mct_ddr3: Work around RDIMM training failure
Timothy Pearson
2016-02-04
northbridge/intel/peg: Disable unused ports
Patrick Rudolph
2016-02-04
nb/intel/sandybridge/raminit: Fix two dimms per channel
Patrick Rudolph
2016-02-02
src: Fix various spelling and whitespace issues.
Martin Roth
2016-02-01
nb/amd/amdmct/mct_ddr3: Save and restore SkewMemClk for S3 resume
Timothy Pearson
2016-02-01
drivers/pc80: Add PS/2 mouse presence detect
Timothy Pearson
2016-01-29
Revert "northbridge/intel/sandybridge: Fix random raminit failures"
Vladimir Serbinenko
2016-01-29
nb/amdmct/mct_ddr3: Enable mainboard voltage set
Timothy Pearson
2016-01-29
cpu/amd/fam10h-fam15h: Correctly create APIC ID on single node systems
Timothy Pearson
2016-01-29
nb/intel/x4x: Move to early cbmem
Damien Zammit
2016-01-29
nb/intel/x4x: Cleanup gma.c
Damien Zammit
2016-01-29
nb/intel/x4x: Tidy up raminit and fix msbpos() function
Damien Zammit
2016-01-29
nb/intel/x4x: Tidy up northbridge
Damien Zammit
2016-01-29
nb/intel/x4x: Fix memory hole with both channels populated
Damien Zammit
2016-01-28
via/cx700: Use zeroptr over 0
Patrick Georgi
2016-01-28
nb/intel/pineview: Native VGA init (CRT)
Damien Zammit
2016-01-26
nb/intel/pineview: Increase MMCONF decoding to 256 busses
Damien Zammit
2016-01-24
nb/amd/mct_ddr3: Properly set MR0 WR value
Timothy Pearson
2016-01-24
nb/amd/mct_ddr3: Add additional verbose-level debug statements
Timothy Pearson
2016-01-24
nb/amd/mct_ddr3: Update drive strength configuration
Timothy Pearson
2016-01-24
northbridge/amd/amdmct/mct_ddr3: Enable fast refresh on ETR devices
Timothy Pearson
2016-01-24
northbridge/amd/amdmct: Add termination and timing values for C32 sockets
Timothy Pearson
2016-01-24
northbridge/amd/amdfam10: Update DRAM speed limits for C32 sockets
Timothy Pearson
2016-01-20
nb/intel/pineview: Use macro names for memory base registers
Damien Zammit
2016-01-18
nb/intel/pineview: Fix decode_pciebar()
Damien Zammit
2016-01-18
header files: Fix guard name comments to match guard names
Martin Roth
2016-01-17
intel/sandybridge/raminit: fix ODT setting
Patrick Rudolph
2016-01-14
nb/intel/gm45: Backport configuration of panel power timings
Nico Huber
2016-01-14
nb/intel/gm45: Drop unnecessary panel power handling
Nico Huber
2016-01-13
tree: drop last paragraph of GPL copyright header from new files
Martin Roth
2016-01-13
intel/northbridge/sandy: raminit code cleanup
Patrick Rudolph
2016-01-13
northbridge/intel/x4x: clean up includes
Martin Roth
2016-01-12
nb/intel/gm45: Convert gma.c to `if (IS_ENABLED(` style
Nico Huber
2016-01-07
Correct some common spelling mistakes
Martin Roth
2016-01-04
Revert "AMD OemS3Save: refactor for Merlin Falcon"
Kyösti Mälkki
2015-12-31
nb/intel/gm45: Export low-power and (SFF) options
Nico Huber
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